ARM: uniphier: drop ifdef in ddrphy-regs.h

The ifdef conditionals in header files prevent us from multi-SoC
support in a single U-Boot image.  Detect SoC specific parameters
run-time rather than define them statically with an ifdef in
ddrphy-regs.h.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

diff --git a/arch/arm/mach-uniphier/dram/cmd_ddrphy.c b/arch/arm/mach-uniphier/dram/cmd_ddrphy.c
index 078eb6f71b4d31c152da0c858bb1f378952466c2..7a9f76caeb7e7e3e78ef2896d0024d363729437d 100644 (file)
--- a/arch/arm/mach-uniphier/dram/cmd_ddrphy.c
+++ b/arch/arm/mach-uniphier/dram/cmd_ddrphy.c
@@ -5,8 +5,11 @@
  */
 
 #include <common.h>
+#include <mapmem.h>
 #include <linux/io.h>
+#include <linux/sizes.h>
 
+#include "../soc-info.h"
 #include "ddrphy-regs.h"
 
 /* Select either decimal or hexadecimal */
@@ -18,26 +21,45 @@
 /* field separator */
 #define FS "   "
 
+static unsigned long uniphier_ld4_base[] = {
+       0x5bc01000,
+       0x5be01000,
+       0 /* sentinel */
+};
+
+static unsigned long uniphier_pro4_base[] = {
+       0x5bc01000,
+       0x5be01000,
+       0 /* sentinel */
+};
+
+static unsigned long uniphier_sld8_base[] = {
+       0x5bc01000,
+       0x5be01000,
+       0 /* sentinel */
+};
+
 static u32 read_bdl(struct ddrphy_datx8 __iomem *dx, int index)
 {
        return (readl(&dx->bdlr[index / 5]) >> (index % 5 * 6)) & 0x3f;
 }
 
-static void dump_loop(void (*callback)(struct ddrphy_datx8 __iomem *))
+static void dump_loop(unsigned long *base,
+                     void (*callback)(struct ddrphy_datx8 __iomem *))
 {
-       int ch, p, dx;
        struct ddrphy __iomem *phy;
+       int p, dx;
 
-       for (ch = 0; ch < NR_DDRCH; ch++) {
-               for (p = 0; p < NR_DDRPHY_PER_CH; p++) {
-                       phy = (struct ddrphy __iomem *)DDRPHY_BASE(ch, p);
+       for (p = 0; *base; base++, p++) {
+               phy = map_sysmem(*base, SZ_4K);
 
-                       for (dx = 0; dx < NR_DATX8_PER_DDRPHY; dx++) {
-                               printf("CH%dP%dDX%d:", ch, p, dx);
-                               (*callback)(&phy->dx[dx]);
-                               printf("\n");
-                       }
+               for (dx = 0; dx < NR_DATX8_PER_DDRPHY; dx++) {
+                       printf("PHY%dDX%d:", p, dx);
+                       (*callback)(&phy->dx[dx]);
+                       printf("\n");
                }
+
+               unmap_sysmem(phy);
        }
 }
 
@@ -51,12 +73,12 @@ static void __wbdl_dump(struct ddrphy_datx8 __iomem *dx)
        printf(FS "(+" PRINTF_FORMAT ")", readl(&dx->lcdlr[1]) & 0xff);
 }
 
-static void wbdl_dump(void)
+static void wbdl_dump(unsigned long *base)
 {
        printf("\n--- Write Bit Delay Line ---\n");
        printf("           DQ0  DQ1  DQ2  DQ3  DQ4  DQ5  DQ6  DQ7   DM  DQS  (WDQD)\n");
 
-       dump_loop(&__wbdl_dump);
+       dump_loop(base, &__wbdl_dump);
 }
 
 static void __rbdl_dump(struct ddrphy_datx8 __iomem *dx)
@@ -69,12 +91,12 @@ static void __rbdl_dump(struct ddrphy_datx8 __iomem *dx)
        printf(FS "(+" PRINTF_FORMAT ")", (readl(&dx->lcdlr[1]) >> 8) & 0xff);
 }
 
-static void rbdl_dump(void)
+static void rbdl_dump(unsigned long *base)
 {
        printf("\n--- Read Bit Delay Line ---\n");
        printf("           DQ0  DQ1  DQ2  DQ3  DQ4  DQ5  DQ6  DQ7   DM  (RDQSD)\n");
 
-       dump_loop(&__rbdl_dump);
+       dump_loop(base, &__rbdl_dump);
 }
 
 static void __wld_dump(struct ddrphy_datx8 __iomem *dx)
@@ -92,12 +114,12 @@ static void __wld_dump(struct ddrphy_datx8 __iomem *dx)
        }
 }
 
-static void wld_dump(void)
+static void wld_dump(unsigned long *base)
 {
        printf("\n--- Write Leveling Delay ---\n");
        printf("            Rank0   Rank1   Rank2   Rank3\n");
 
-       dump_loop(&__wld_dump);
+       dump_loop(base, &__wld_dump);
 }
 
 static void __dqsgd_dump(struct ddrphy_datx8 __iomem *dx)
@@ -114,12 +136,12 @@ static void __dqsgd_dump(struct ddrphy_datx8 __iomem *dx)
        }
 }
 
-static void dqsgd_dump(void)
+static void dqsgd_dump(unsigned long *base)
 {
        printf("\n--- DQS Gating Delay ---\n");
        printf("            Rank0   Rank1   Rank2   Rank3\n");
 
-       dump_loop(&__dqsgd_dump);
+       dump_loop(base, &__dqsgd_dump);
 }
 
 static void __mdl_dump(struct ddrphy_datx8 __iomem *dx)
@@ -130,90 +152,106 @@ static void __mdl_dump(struct ddrphy_datx8 __iomem *dx)
                printf(FS PRINTF_FORMAT, (mdl >> (8 * i)) & 0xff);
 }
 
-static void mdl_dump(void)
+static void mdl_dump(unsigned long *base)
 {
        printf("\n--- Master Delay Line ---\n");
        printf("          IPRD TPRD MDLD\n");
 
-       dump_loop(&__mdl_dump);
+       dump_loop(base, &__mdl_dump);
 }
 
 #define REG_DUMP(x) \
        { u32 __iomem *p = &phy->x; printf("%3d: %-10s: %p : %08x\n", \
                                        p - (u32 *)phy, #x, p, readl(p)); }
 
-static void reg_dump(void)
+static void reg_dump(unsigned long *base)
 {
-       int ch, p;
        struct ddrphy __iomem *phy;
+       int p;
 
        printf("\n--- DDR PHY registers ---\n");
 
-       for (ch = 0; ch < NR_DDRCH; ch++) {
-               for (p = 0; p < NR_DDRPHY_PER_CH; p++) {
-                       printf("== Ch%d, PHY%d ==\n", ch, p);
-                       printf(" No: Name      : Address  : Data\n");
-
-                       phy = (struct ddrphy __iomem *)DDRPHY_BASE(ch, p);
-
-                       REG_DUMP(ridr);
-                       REG_DUMP(pir);
-                       REG_DUMP(pgcr[0]);
-                       REG_DUMP(pgcr[1]);
-                       REG_DUMP(pgsr[0]);
-                       REG_DUMP(pgsr[1]);
-                       REG_DUMP(pllcr);
-                       REG_DUMP(ptr[0]);
-                       REG_DUMP(ptr[1]);
-                       REG_DUMP(ptr[2]);
-                       REG_DUMP(ptr[3]);
-                       REG_DUMP(ptr[4]);
-                       REG_DUMP(acmdlr);
-                       REG_DUMP(acbdlr);
-                       REG_DUMP(dxccr);
-                       REG_DUMP(dsgcr);
-                       REG_DUMP(dcr);
-                       REG_DUMP(dtpr[0]);
-                       REG_DUMP(dtpr[1]);
-                       REG_DUMP(dtpr[2]);
-                       REG_DUMP(mr0);
-                       REG_DUMP(mr1);
-                       REG_DUMP(mr2);
-                       REG_DUMP(mr3);
-                       REG_DUMP(dx[0].gcr);
-                       REG_DUMP(dx[0].gtr);
-                       REG_DUMP(dx[1].gcr);
-                       REG_DUMP(dx[1].gtr);
-               }
+       for (p = 0; *base; base++, p++) {
+               phy = map_sysmem(*base, SZ_4K);
+
+               printf("== PHY%d (base: %p) ==\n", p, phy);
+               printf(" No: Name      : Address  : Data\n");
+
+               REG_DUMP(ridr);
+               REG_DUMP(pir);
+               REG_DUMP(pgcr[0]);
+               REG_DUMP(pgcr[1]);
+               REG_DUMP(pgsr[0]);
+               REG_DUMP(pgsr[1]);
+               REG_DUMP(pllcr);
+               REG_DUMP(ptr[0]);
+               REG_DUMP(ptr[1]);
+               REG_DUMP(ptr[2]);
+               REG_DUMP(ptr[3]);
+               REG_DUMP(ptr[4]);
+               REG_DUMP(acmdlr);
+               REG_DUMP(acbdlr);
+               REG_DUMP(dxccr);
+               REG_DUMP(dsgcr);
+               REG_DUMP(dcr);
+               REG_DUMP(dtpr[0]);
+               REG_DUMP(dtpr[1]);
+               REG_DUMP(dtpr[2]);
+               REG_DUMP(mr0);
+               REG_DUMP(mr1);
+               REG_DUMP(mr2);
+               REG_DUMP(mr3);
+               REG_DUMP(dx[0].gcr);
+               REG_DUMP(dx[0].gtr);
+               REG_DUMP(dx[1].gcr);
+               REG_DUMP(dx[1].gtr);
+
+               unmap_sysmem(phy);
        }
 }
 
 static int do_ddr(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 {
        char *cmd = argv[1];
+       unsigned long *base;
+
+       switch (uniphier_get_soc_type()) {
+       case SOC_UNIPHIER_LD4:
+               base = uniphier_ld4_base;
+               break;
+       case SOC_UNIPHIER_PRO4:
+               base = uniphier_pro4_base;
+               break;
+       case SOC_UNIPHIER_SLD8:
+               base = uniphier_sld8_base;
+               break;
+       default:
+               printf("unsupported SoC\n");
+               return CMD_RET_FAILURE;
+       }
 
        if (argc == 1)
                cmd = "all";
 
        if (!strcmp(cmd, "wbdl") || !strcmp(cmd, "all"))
-               wbdl_dump();
+               wbdl_dump(base);
 
        if (!strcmp(cmd, "rbdl") || !strcmp(cmd, "all"))
-               rbdl_dump();
+               rbdl_dump(base);
 
        if (!strcmp(cmd, "wld") || !strcmp(cmd, "all"))
-               wld_dump();
+               wld_dump(base);
 
        if (!strcmp(cmd, "dqsgd") || !strcmp(cmd, "all"))
-               dqsgd_dump();
+               dqsgd_dump(base);
 
        if (!strcmp(cmd, "mdl") || !strcmp(cmd, "all"))
-               mdl_dump();
+               mdl_dump(base);
 
        if (!strcmp(cmd, "reg") || !strcmp(cmd, "all"))
-               reg_dump();
+               reg_dump(base);
 
-       return 0;
+       return CMD_RET_SUCCESS;
 }
 
 U_BOOT_CMD(

diff --git a/arch/arm/mach-uniphier/dram/ddrphy-regs.h b/arch/arm/mach-uniphier/dram/ddrphy-regs.h
index 2bcfc1e5fb28b6cb661d8eb39fa16eb8d2cf0c98..a1d51cedf3bef1fb15bf3d5d88d3edff7254a514 100644 (file)
--- a/arch/arm/mach-uniphier/dram/ddrphy-regs.h
+++ b/arch/arm/mach-uniphier/dram/ddrphy-regs.h
@@ -158,16 +158,6 @@ struct ddrphy {
 /* SoC-specific parameters */
 #define NR_DATX8_PER_DDRPHY    2
 
-#if defined(CONFIG_ARCH_UNIPHIER_LD4) || defined(CONFIG_ARCH_UNIPHIER_SLD8)
-#define NR_DDRPHY_PER_CH               1
-#else
-#define NR_DDRPHY_PER_CH               2
-#endif
-
-#define NR_DDRCH               2
-
-#define DDRPHY_BASE(ch, phy)   (0x5bc01000 + 0x200000 * (ch) + 0x1000 * (phy))
-
 #ifndef __ASSEMBLY__
 int ph1_ld4_ddrphy_init(struct ddrphy __iomem *phy, int freq, bool ddr3plus);
 void ddrphy_prepare_training(struct ddrphy __iomem *phy, int rank);