rockchip: add common tpl board file

Rockchip SoCs have similar boot process, prefer to use TPL for DRAM
init and back to bootrom, and SPL as Trust ATF/U-Boot loader. TPL
common board is a basic TPL board init which can be shared for most
of SoCs to avoid copy-pase for different SoCs.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 85f88cea77982549e2896b974877b5459a016f95..2b83a6848911937a26ab8dc80f97ea2b98aa3591 100644 (file)
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -223,6 +223,15 @@ config TPL_ROCKCHIP_BACK_TO_BROM
           SPL will return to the boot rom, which will then load the U-Boot
           binary to keep going on.
 
+config TPL_ROCKCHIP_COMMON_BOARD
+       bool ""
+       depends on TPL
+       help
+         Rockchip SoCs have similar boot process, prefer to use TPL for DRAM
+         init and back to bootrom, and SPL as Trust ATF/U-Boot loader. TPL
+         common board is a basic TPL board init which can be shared for most
+         of SoCs to avoid copy-pase for different SoCs.
+
 config ROCKCHIP_BOOT_MODE_REG
        hex "Rockchip boot mode flag register address"
        help

diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile
index 9afbb055d57ff648adbbb2d7ffd089963606818f..2686e0c46c235927470b2da53260047858aec68f 100644 (file)
--- a/arch/arm/mach-rockchip/Makefile
+++ b/arch/arm/mach-rockchip/Makefile
@@ -8,6 +8,7 @@
 # the stack-pointer is valid before switching to the U-Boot stack).
 obj-spl-$(CONFIG_ROCKCHIP_BROM_HELPER) += bootrom.o
 obj-tpl-$(CONFIG_ROCKCHIP_BROM_HELPER) += bootrom.o
+obj-tpl-$(CONFIG_TPL_ROCKCHIP_COMMON_BOARD) += tpl.o
 
 obj-tpl-$(CONFIG_ROCKCHIP_RK3288) += rk3288-board-tpl.o
 obj-tpl-$(CONFIG_ROCKCHIP_RK3368) += rk3368-board-tpl.o

diff --git a/arch/arm/mach-rockchip/tpl.c b/arch/arm/mach-rockchip/tpl.c
new file mode 100644 (file)
index 0000000..0ff2a19
--- /dev/null
+++ b/arch/arm/mach-rockchip/tpl.c
@@ -0,0 +1,86 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2019 Rockchip Electronics Co., Ltd
+ */
+
+#include <common.h>
+#include <debug_uart.h>
+#include <dm.h>
+#include <ram.h>
+#include <spl.h>
+#include <version.h>
+#include <asm/io.h>
+#include <asm/arch-rockchip/bootrom.h>
+
+#define TIMER_LOAD_COUNT_L     0x00
+#define TIMER_LOAD_COUNT_H     0x04
+#define TIMER_CONTROL_REG      0x10
+#define TIMER_EN       0x1
+#define        TIMER_FMODE     BIT(0)
+#define        TIMER_RMODE     BIT(1)
+
+__weak void rockchip_stimer_init(void)
+{
+       /* If Timer already enabled, don't re-init it */
+       u32 reg = readl(CONFIG_ROCKCHIP_STIMER_BASE + TIMER_CONTROL_REG);
+
+       if (reg & TIMER_EN)
+               return;
+
+#ifndef CONFIG_ARM64
+       asm volatile("mcr p15, 0, %0, c14, c0, 0"
+                    : : "r"(COUNTER_FREQUENCY));
+#endif
+
+       writel(0, CONFIG_ROCKCHIP_STIMER_BASE + TIMER_CONTROL_REG);
+       writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE);
+       writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE + 4);
+       writel(TIMER_EN | TIMER_FMODE, CONFIG_ROCKCHIP_STIMER_BASE +
+              TIMER_CONTROL_REG);
+}
+
+void board_init_f(ulong dummy)
+{
+       struct udevice *dev;
+       int ret;
+
+#ifdef CONFIG_DEBUG_UART
+       /*
+        * Debug UART can be used from here if required:
+        *
+        * debug_uart_init();
+        * printch('a');
+        * printhex8(0x1234);
+        * printascii("string");
+        */
+       debug_uart_init();
+       printascii("\nU-Boot TPL " PLAIN_VERSION " (" U_BOOT_DATE " - " \
+                               U_BOOT_TIME ")\n");
+#endif
+       ret = spl_early_init();
+       if (ret) {
+               debug("spl_early_init() failed: %d\n", ret);
+               hang();
+       }
+
+       /* Init secure timer */
+       rockchip_stimer_init();
+       /* Init ARM arch timer in arch/arm/cpu/ */
+       timer_init();
+
+       ret = uclass_get_device(UCLASS_RAM, 0, &dev);
+       if (ret) {
+               printf("DRAM init failed: %d\n", ret);
+               return;
+       }
+}
+
+void board_return_to_bootrom(void)
+{
+       back_to_bootrom(BROM_BOOT_NEXTSTAGE);
+}
+
+u32 spl_boot_device(void)
+{
+       return BOOT_DEVICE_BOOTROM;
+}