usb: ehci: exynos: set/reset hsic phys

The controller has 3 ports. The port0 is for USB 2.0 Phy, port1 and port2
are for HSIC phys. The usb 2.0 phy is already being setup. This patch
sets up the hsic phys.

Signed-off-by: Inderpal Singh <inderpal.singh@linaro.org>

diff --git a/arch/arm/include/asm/arch-exynos/ehci.h b/arch/arm/include/asm/arch-exynos/ehci.h
index d79f25c0c300f18e4763c5cbdcd3f64a3e6ef3fe..d2d70bd82be801db6a95dc2319451a2498d32937 100644 (file)
--- a/arch/arm/include/asm/arch-exynos/ehci.h
+++ b/arch/arm/include/asm/arch-exynos/ehci.h
@@ -29,6 +29,20 @@
 #define EHCICTRL_ENAINCR8                      (1 << 27)
 #define EHCICTRL_ENAINCR16                     (1 << 26)
 
+#define HSIC_CTRL_REFCLKSEL                     (0x2)
+#define HSIC_CTRL_REFCLKSEL_MASK                (0x3)
+#define HSIC_CTRL_REFCLKSEL_SHIFT               (23)
+
+#define HSIC_CTRL_REFCLKDIV_12                  (0x24)
+#define HSIC_CTRL_REFCLKDIV_MASK                (0x7f)
+#define HSIC_CTRL_REFCLKDIV_SHIFT               (16)
+
+#define HSIC_CTRL_SIDDQ                         (0x1 << 6)
+#define HSIC_CTRL_FORCESLEEP                    (0x1 << 5)
+#define HSIC_CTRL_FORCESUSPEND                  (0x1 << 4)
+#define HSIC_CTRL_UTMISWRST                     (0x1 << 2)
+#define HSIC_CTRL_PHYSWRST                      (0x1 << 0)
+
 /* Register map for PHY control */
 struct exynos_usb_phy {
        unsigned int usbphyctrl0;

diff --git a/drivers/usb/host/ehci-exynos.c b/drivers/usb/host/ehci-exynos.c
index 66b4de0b2d05d7a33ca6a11acabeb8fdf1d2537a..88e646690a9e325dc924bfe61e654004483ab1c9 100644 (file)
--- a/drivers/usb/host/ehci-exynos.c
+++ b/drivers/usb/host/ehci-exynos.c
@@ -88,6 +88,8 @@ static int exynos_usb_parse_dt(const void *blob, struct exynos_ehci *exynos)
 /* Setup the EHCI host controller. */
 static void setup_usb_phy(struct exynos_usb_phy *usb)
 {
+       u32 hsic_ctrl;
+
        set_usbhost_mode(USB20_PHY_CFG_HOST_LINK_EN);
 
        set_usbhost_phy_ctrl(POWER_USB_HOST_PHY_CTRL_EN);
@@ -112,6 +114,32 @@ static void setup_usb_phy(struct exynos_usb_phy *usb)
        clrbits_le32(&usb->usbphyctrl0,
                        HOST_CTRL0_LINKSWRST |
                        HOST_CTRL0_UTMISWRST);
+
+       /* HSIC Phy Setting */
+       hsic_ctrl = (HSIC_CTRL_FORCESUSPEND |
+                       HSIC_CTRL_FORCESLEEP |
+                       HSIC_CTRL_SIDDQ);
+
+       clrbits_le32(&usb->hsicphyctrl1, hsic_ctrl);
+       clrbits_le32(&usb->hsicphyctrl2, hsic_ctrl);
+
+       hsic_ctrl = (((HSIC_CTRL_REFCLKDIV_12 & HSIC_CTRL_REFCLKDIV_MASK)
+                               << HSIC_CTRL_REFCLKDIV_SHIFT)
+                       | ((HSIC_CTRL_REFCLKSEL & HSIC_CTRL_REFCLKSEL_MASK)
+                               << HSIC_CTRL_REFCLKSEL_SHIFT)
+                       | HSIC_CTRL_UTMISWRST);
+
+       setbits_le32(&usb->hsicphyctrl1, hsic_ctrl);
+       setbits_le32(&usb->hsicphyctrl2, hsic_ctrl);
+
+       udelay(10);
+
+       clrbits_le32(&usb->hsicphyctrl1, HSIC_CTRL_PHYSWRST |
+                                       HSIC_CTRL_UTMISWRST);
+
+       clrbits_le32(&usb->hsicphyctrl2, HSIC_CTRL_PHYSWRST |
+                                       HSIC_CTRL_UTMISWRST);
+
        udelay(20);
 
        /* EHCI Ctrl setting */
@@ -125,6 +153,8 @@ static void setup_usb_phy(struct exynos_usb_phy *usb)
 /* Reset the EHCI host controller. */
 static void reset_usb_phy(struct exynos_usb_phy *usb)
 {
+       u32 hsic_ctrl;
+
        /* HOST_PHY reset */
        setbits_le32(&usb->usbphyctrl0,
                        HOST_CTRL0_PHYSWRST |
@@ -133,6 +163,15 @@ static void reset_usb_phy(struct exynos_usb_phy *usb)
                        HOST_CTRL0_FORCESUSPEND |
                        HOST_CTRL0_FORCESLEEP);
 
+       /* HSIC Phy reset */
+       hsic_ctrl = (HSIC_CTRL_FORCESUSPEND |
+                       HSIC_CTRL_FORCESLEEP |
+                       HSIC_CTRL_SIDDQ |
+                       HSIC_CTRL_PHYSWRST);
+
+       setbits_le32(&usb->hsicphyctrl1, hsic_ctrl);
+       setbits_le32(&usb->hsicphyctrl2, hsic_ctrl);
+
        set_usbhost_phy_ctrl(POWER_USB_HOST_PHY_CTRL_DISABLE);
 }