x86: bios: Allow pci config read/write to host bridge in int1a_handler

We should allow pci config read/write to host bridge (b.d.f = 0.0.0)
in the int1a_handler() which is a valid pci device.

Signed-off-by: Jian Luo <jian.luo4@boschrexroth.de>
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>

diff --git a/arch/x86/lib/bios_interrupts.c b/arch/x86/lib/bios_interrupts.c
index 290990a8bdd3b0cd1302511c112207d17c279f59..47d9f599a30b3e66d5df838215df4ff0efbdcb24 100644 (file)
--- a/arch/x86/lib/bios_interrupts.c
+++ b/arch/x86/lib/bios_interrupts.c
@@ -161,15 +161,7 @@ int int1a_handler(void)
                bus = M.x86.R_EBX >> 8;
                reg = M.x86.R_EDI;
                dev = PCI_BDF(bus, devfn >> 3, devfn & 7);
-               if (!dev) {
-                       debug("0x%x: BAD DEVICE bus %d devfn 0x%x\n", func,
-                             bus, devfn);
-                       /* Or are we supposed to return PCIBIOS_NODEV? */
-                       M.x86.R_EAX &= 0xffff00ff; /* Clear AH */
-                       M.x86.R_EAX |= PCIBIOS_BADREG;
-                       retval = 0;
-                       return retval;
-               }
+
                switch (func) {
                case 0xb108: /* Read Config Byte */
                        byte = x86_pci_read_config8(dev, reg);