sunxi: clk: enable clk and reset for CCU devices

Some Allwinner clock devices have parent clocks and reset gates itself,
which need to be activated for them to work.

Add some code to just assert all resets and enable all clocks given.
This should enable the A80 MMC config clock, which requires both to be
activated. The full CCU devices typically don't require resets, and have
just fixed clocks as their parents. Since we treat both as optional and
enabling fixed clocks is a NOP, this works for all cases, without the need
to differentiate between those clock types.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Jagan Teki <jagan@openedev.com>

diff --git a/drivers/clk/sunxi/clk_sunxi.c b/drivers/clk/sunxi/clk_sunxi.c
index 62ce2994e4fb3cfef34c295a7a2afe9da7d51561..6d4aeb5315d47dd83aa79077a612c18d391ba07e 100644 (file)
--- a/drivers/clk/sunxi/clk_sunxi.c
+++ b/drivers/clk/sunxi/clk_sunxi.c
@@ -8,6 +8,7 @@
 #include <clk-uclass.h>
 #include <dm.h>
 #include <errno.h>
+#include <reset.h>
 #include <asm/io.h>
 #include <asm/arch/ccu.h>
 #include <linux/log2.h>
@@ -61,6 +62,9 @@ struct clk_ops sunxi_clk_ops = {
 int sunxi_clk_probe(struct udevice *dev)
 {
        struct ccu_priv *priv = dev_get_priv(dev);
+       struct clk_bulk clk_bulk;
+       struct reset_ctl_bulk rst_bulk;
+       int ret;
 
        priv->base = dev_read_addr_ptr(dev);
        if (!priv->base)
@@ -70,5 +74,13 @@ int sunxi_clk_probe(struct udevice *dev)
        if (!priv->desc)
                return -EINVAL;
 
+       ret = clk_get_bulk(dev, &clk_bulk);
+       if (!ret)
+               clk_enable_bulk(&clk_bulk);
+
+       ret = reset_get_bulk(dev, &rst_bulk);
+       if (!ret)
+               reset_deassert_bulk(&rst_bulk);
+
        return 0;
 }