At present the security chip is not used in these U-Boot phases. Update
the Makefile to exclude it.
Fix a few logging statements while we are here.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
obj-$(CONFIG_TPM_ST33ZP24_I2C) += tpm_tis_st33zp24_i2c.o
obj-$(CONFIG_TPM_ST33ZP24_SPI) += tpm_tis_st33zp24_spi.o
-obj-$(CONFIG_TPM2_CR50_I2C) += cr50_i2c.o
+obj-$(CONFIG_$(SPL_TPL_)TPM2_CR50_I2C) += cr50_i2c.o
obj-$(CONFIG_TPM2_TIS_SANDBOX) += tpm2_tis_sandbox.o
obj-$(CONFIG_TPM2_TIS_SPI) += tpm2_tis_spi.o
obj-$(CONFIG_TPM2_FTPM_TEE) += tpm2_ftpm_tee.o
int status;
int ret;
- log_debug("%s: len=%x\n", __func__, buf_len);
+ log_debug("%s: buf_len=%x\n", __func__, buf_len);
if (buf_len < TPM_HEADER_SIZE)
return -E2BIG;
ulong timeout;
int ret;
- log_debug("%s: len=%x\n", __func__, len);
+ log_debug("len=%x\n", len);
timeout = timer_get_us() + TIMEOUT_LONG_US;
do {
ret = cr50_i2c_status(dev);