arm64: zynqmp: Describe TI phy as ethernet-phy-id

TI DP83867 is using strapping based on MIO pins. Tristate setup can influce
PHY address. That's why switch description with ethernet-phy-id compatible
string which enable calling reset. PHY itself setups phy address after
power up or reset. Reset description will be added in separate commit.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/52bf9ac0453d4e4896d8edd2618e684bb1ff6012.1662721547.git.michal.simek@amd.com

diff --git a/arch/arm/dts/zynqmp-zcu102-revA.dts b/arch/arm/dts/zynqmp-zcu102-revA.dts
index a4e92c8bb16b747a635fddf8aefbff5e9cb4f67c..8d8f495714b580823b3605d23a88537302243172 100644 (file)
--- a/arch/arm/dts/zynqmp-zcu102-revA.dts
+++ b/arch/arm/dts/zynqmp-zcu102-revA.dts
@@ -200,13 +200,19 @@
        phy-mode = "rgmii-id";
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_gem3_default>;
-       phy0: ethernet-phy@21 {
-               reg = <21>;
-               ti,rx-internal-delay = <0x8>;
-               ti,tx-internal-delay = <0xa>;
-               ti,fifo-depth = <0x1>;
-               ti,dp83867-rxctrl-strap-quirk;
-               /* reset-gpios = <&tca6416_u97 6 GPIO_ACTIVE_LOW>; */
+       mdio: mdio {
+               #address-cells = <1>;
+               #size-cells = <0>;
+               phy0: ethernet-phy@21 {
+                       #phy-cells = <1>;
+                       compatible = "ethernet-phy-id2000.a231";
+                       reg = <21>;
+                       ti,rx-internal-delay = <0x8>;
+                       ti,tx-internal-delay = <0xa>;
+                       ti,fifo-depth = <0x1>;
+                       ti,dp83867-rxctrl-strap-quirk;
+                       /* reset-gpios = <&tca6416_u97 6 GPIO_ACTIVE_LOW>; */
+               };
        };
 };
 

diff --git a/arch/arm/dts/zynqmp-zcu104-revA.dts b/arch/arm/dts/zynqmp-zcu104-revA.dts
index 1418cffb20422c6971cccbe2681a957255a2cba2..6df9a134385955f3744f226bc296a4a86cea3937 100644 (file)
--- a/arch/arm/dts/zynqmp-zcu104-revA.dts
+++ b/arch/arm/dts/zynqmp-zcu104-revA.dts
@@ -109,12 +109,18 @@
        phy-mode = "rgmii-id";
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_gem3_default>;
-       phy0: ethernet-phy@c {
-               reg = <0xc>;
-               ti,rx-internal-delay = <0x8>;
-               ti,tx-internal-delay = <0xa>;
-               ti,fifo-depth = <0x1>;
-               ti,dp83867-rxctrl-strap-quirk;
+       mdio: mdio {
+               #address-cells = <1>;
+               #size-cells = <0>;
+               phy0: ethernet-phy@c {
+                       #phy-cells = <1>;
+                       compatible = "ethernet-phy-id2000.a231";
+                       reg = <0xc>;
+                       ti,rx-internal-delay = <0x8>;
+                       ti,tx-internal-delay = <0xa>;
+                       ti,fifo-depth = <0x1>;
+                       ti,dp83867-rxctrl-strap-quirk;
+               };
        };
 };
 

diff --git a/arch/arm/dts/zynqmp-zcu104-revC.dts b/arch/arm/dts/zynqmp-zcu104-revC.dts
index 7fd19ca3a8c0be1c8d02640b46f2872f31553b7b..0721516bd1091fa3e6bc7616e92418f5f99c41c8 100644 (file)
--- a/arch/arm/dts/zynqmp-zcu104-revC.dts
+++ b/arch/arm/dts/zynqmp-zcu104-revC.dts
@@ -114,12 +114,18 @@
        phy-mode = "rgmii-id";
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_gem3_default>;
-       phy0: ethernet-phy@c {
-               reg = <0xc>;
-               ti,rx-internal-delay = <0x8>;
-               ti,tx-internal-delay = <0xa>;
-               ti,fifo-depth = <0x1>;
-               ti,dp83867-rxctrl-strap-quirk;
+       mdio: mdio {
+               #address-cells = <1>;
+               #size-cells = <0>;
+               phy0: ethernet-phy@c {
+                       #phy-cells = <1>;
+                       compatible = "ethernet-phy-id2000.a231";
+                       reg = <0xc>;
+                       ti,rx-internal-delay = <0x8>;
+                       ti,tx-internal-delay = <0xa>;
+                       ti,fifo-depth = <0x1>;
+                       ti,dp83867-rxctrl-strap-quirk;
+               };
        };
 };
 

diff --git a/arch/arm/dts/zynqmp-zcu111-revA.dts b/arch/arm/dts/zynqmp-zcu111-revA.dts
index e412992ff1bd45c352b8f2db7eb7afcf8e60cf47..c37c4b8b6177b95869645bf53ed42101b7e2072d 100644 (file)
--- a/arch/arm/dts/zynqmp-zcu111-revA.dts
+++ b/arch/arm/dts/zynqmp-zcu111-revA.dts
@@ -172,12 +172,18 @@
        phy-mode = "rgmii-id";
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_gem3_default>;
-       phy0: ethernet-phy@c {
-               reg = <0xc>;
-               ti,rx-internal-delay = <0x8>;
-               ti,tx-internal-delay = <0xa>;
-               ti,fifo-depth = <0x1>;
-               ti,dp83867-rxctrl-strap-quirk;
+       mdio: mdio {
+               #address-cells = <1>;
+               #size-cells = <0>;
+               phy0: ethernet-phy@c {
+                       #phy-cells = <1>;
+                       compatible = "ethernet-phy-id2000.a231";
+                       reg = <0xc>;
+                       ti,rx-internal-delay = <0x8>;
+                       ti,tx-internal-delay = <0xa>;
+                       ti,fifo-depth = <0x1>;
+                       ti,dp83867-rxctrl-strap-quirk;
+               };
        };
 };
 

diff --git a/arch/arm/dts/zynqmp-zcu208-revA.dts b/arch/arm/dts/zynqmp-zcu208-revA.dts
index c5cdd58af6edddbbf785144e0e621e962241f2ae..3e8ee429eb79f842eab57ff63298455277922d78 100644 (file)
--- a/arch/arm/dts/zynqmp-zcu208-revA.dts
+++ b/arch/arm/dts/zynqmp-zcu208-revA.dts
@@ -169,12 +169,18 @@
        status = "okay";
        phy-handle = <&phy0>;
        phy-mode = "rgmii-id";
-       phy0: ethernet-phy@c {
-               reg = <0xc>;
-               ti,rx-internal-delay = <0x8>;
-               ti,tx-internal-delay = <0xa>;
-               ti,fifo-depth = <0x1>;
-               ti,dp83867-rxctrl-strap-quirk;
+       mdio: mdio {
+               #address-cells = <1>;
+               #size-cells = <0>;
+               phy0: ethernet-phy@c {
+                       #phy-cells = <1>;
+                       compatible = "ethernet-phy-id2000.a231";
+                       reg = <0xc>;
+                       ti,rx-internal-delay = <0x8>;
+                       ti,tx-internal-delay = <0xa>;
+                       ti,fifo-depth = <0x1>;
+                       ti,dp83867-rxctrl-strap-quirk;
+               };
        };
 };
 

diff --git a/arch/arm/dts/zynqmp-zcu216-revA.dts b/arch/arm/dts/zynqmp-zcu216-revA.dts
index caae16965d6f8419dd8cba51e4e583121bc56924..80e7ddb97080837a21c2a0e457ac0aae9bd6c507 100644 (file)
--- a/arch/arm/dts/zynqmp-zcu216-revA.dts
+++ b/arch/arm/dts/zynqmp-zcu216-revA.dts
@@ -176,15 +176,20 @@
        status = "okay";
        phy-handle = <&phy0>;
        phy-mode = "rgmii-id";
-       phy0: ethernet-phy@c {
-               reg = <0xc>;
-               ti,rx-internal-delay = <0x8>;
-               ti,tx-internal-delay = <0xa>;
-               ti,fifo-depth = <0x1>;
-               ti,dp83867-rxctrl-strap-quirk;
+       mdio: mdio {
+               #address-cells = <1>;
+               #size-cells = <0>;
+               phy0: ethernet-phy@c {
+                       #phy-cells = <1>;
+                       compatible = "ethernet-phy-id2000.a231";
+                       reg = <0xc>;
+                       ti,rx-internal-delay = <0x8>;
+                       ti,tx-internal-delay = <0xa>;
+                       ti,fifo-depth = <0x1>;
+                       ti,dp83867-rxctrl-strap-quirk;
+               };
        };
 };
-
 &gpio {
        status = "okay";
        gpio-line-names = "QSPI_LWR_CLK", "QSPI_LWR_DQ1", "QSPI_LWR_DQ2", "QSPI_LWR_DQ3", "QSPI_LWR_DQ0", /* 0 - 4 */