]> git.dujemihanovic.xyz Git - u-boot.git/commitdiff
mtd: spi-nor: Set ECC unit size to MTD writesize in Infineon SEMPER flashes
authorTakahiro Kuwano <Takahiro.Kuwano@infineon.com>
Tue, 15 Oct 2024 04:08:36 +0000 (13:08 +0900)
committerTom Rini <trini@konsulko.com>
Tue, 15 Oct 2024 14:57:49 +0000 (08:57 -0600)
The Infineon SEMPER NOR flash family uses 2-bit ECC by default with each
ECC block being 16 bytes. Under this scheme multi-pass programming to an
ECC block is not allowed. Set the writesize to make sure multi-pass
programming is not attempted on the flash.

Acked-by: Tudor Ambarus <tudor.ambarus@linaro.org>
Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com>
drivers/mtd/spi/spi-nor-core.c

index 46af9b4fe4733854981850f54daac5f8696179bf..f5c9868bbca7c495676717bc8ba56fe97b10b985 100644 (file)
@@ -3855,6 +3855,13 @@ static void s25_late_init(struct spi_nor *nor,
                          struct spi_nor_flash_parameter *params)
 {
        nor->setup = s25_s28_setup;
+
+       /*
+        * Programming is supported only in 16-byte ECC data unit granularity.
+        * Byte-programming, bit-walking, or multiple program operations to the
+        * same ECC data unit without an erase are not allowed.
+        */
+       params->writesize = 16;
 }
 
 static int s25_s28_post_bfpt_fixup(struct spi_nor *nor,
@@ -4019,6 +4026,13 @@ static void s28hx_t_late_init(struct spi_nor *nor,
 {
        nor->octal_dtr_enable = spi_nor_cypress_octal_dtr_enable;
        nor->setup = s25_s28_setup;
+
+       /*
+        * Programming is supported only in 16-byte ECC data unit granularity.
+        * Byte-programming, bit-walking, or multiple program operations to the
+        * same ECC data unit without an erase are not allowed.
+        */
+       params->writesize = 16;
 }
 
 static void s28hx_t_post_sfdp_fixup(struct spi_nor *nor,