mx25: fix the offset between the USB ports' registers

The USBOH module on imx25 chips contains two USB controllers which are
called USB OTG Controller and USB Host Controller. Each one has its EHCI
root hub. The OTG Controller's EHCI registers start at offset 0, the Host
Controller's registers start at offset 0x400.

We set CONFIG_MXC_USB_PORT=0 to select the OTG Controller and 1 for the
Host Controller. Therefore, IMX_USB_PORT_OFFSET must be 0x400. Using
this setting, the Host Controller starts working on my imx25 board.

Please note that the imx25 reference manual claims that the Host
Controller's registers start at 0x200. This is not correct. The Linux
Kernel uses the correct offset 0x400 in imx25.dtsi.

Signed-off-by: Martin Kaiser <martin@kaiser.cx>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>

diff --git a/arch/arm/include/asm/arch-mx25/imx-regs.h b/arch/arm/include/asm/arch-mx25/imx-regs.h
index f4abbde17199f5aaa8a1cca1d0c4eaf5e3fab854..cee42e5bb2f4ab8b6ec3404e3f4b1e085e06c344 100644 (file)
--- a/arch/arm/include/asm/arch-mx25/imx-regs.h
+++ b/arch/arm/include/asm/arch-mx25/imx-regs.h
@@ -359,7 +359,12 @@ struct cspi_regs {
 #define IMX_IIM_BASE           (0x53FF0000)
 #define IIM_BASE_ADDR          IMX_IIM_BASE
 #define IMX_USB_BASE           (0x53FF4000)
-#define IMX_USB_PORT_OFFSET    0x200
+/*
+ * This is in contradiction to the imx25 reference manual, which says that
+ * port 1's registers start at 0x53FF4200. The correct base address for
+ * port 1 is 0x53FF4400. The kernel uses 0x53FF4400 as well.
+ */
+#define IMX_USB_PORT_OFFSET    0x400
 #define IMX_CSI_BASE           (0x53FF8000)
 #define IMX_DRYICE_BASE                (0x53FFC000)