]> git.dujemihanovic.xyz Git - u-boot.git/commitdiff
rockchip: rk3399-rock-pi-n10: Sync DT from v6.8 and update defconfig
authorJonas Karlman <jonas@kwiboo.se>
Wed, 1 May 2024 16:22:25 +0000 (16:22 +0000)
committerKever Yang <kever.yang@rock-chips.com>
Tue, 7 May 2024 07:56:09 +0000 (15:56 +0800)
Sync rk3399-rock-pi-n10 related device tree from Linux kernel v6.8.

Remove SPL_GPIO=y, board does not use gpio in SPL.

Change to SPL_MAX_SIZE=0x40000, SPL can be up to 256 KiB.

Add ROCKCHIP_IODOMAIN=y to configure io-domain voltage.

Add MMC_SDHCI_SDMA=y to use DMA transfer for eMMC.

Add PHY_REALTEK=y and DM_ETH_PHY=y to support ethernet PHY.

Remove REGULATOR_PWM=y, board does not use pwm-regulator compatible.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
arch/arm/dts/rk3288-vmarc-som.dtsi
arch/arm/dts/rk3399pro-vmarc-som.dtsi
arch/arm/dts/rockchip-radxa-dalang-carrier.dtsi
configs/rock-pi-n10-rk3399pro_defconfig

index 717cb3dc816ee641b4942a15d00f8ecc564fac13..793951655b73b84812c8ac78898b299858514712 100644 (file)
        };
 };
 
+&i2c1 {
+       clock-frequency = <400000>;
+       status = "okay";
+
+       hym8563: rtc@51 {
+               compatible = "haoyu,hym8563";
+               reg = <0x51>;
+               interrupt-parent = <&gpio5>;
+               interrupts = <RK_PC3 IRQ_TYPE_LEVEL_LOW>;
+               #clock-cells = <0>;
+               clock-output-names = "hym8563";
+               pinctrl-names = "default";
+               pinctrl-0 = <&hym8563_int>;
+       };
+};
+
 &i2c5 {
        status = "okay";
 };
 
+&io_domains {
+       bb-supply = <&vcc_io>;
+       flash0-supply = <&vccio_flash>;
+       gpio1830-supply = <&vcc_18>;
+       gpio30-supply = <&vcc_io>;
+       sdcard-supply = <&vccio_sd>;
+       wifi-supply = <&vcc_wl>;
+       status = "okay";
+};
+
 &pinctrl {
+       hym8563 {
+               hym8563_int: hym8563-int {
+                       rockchip,pins = <5 RK_PC3 RK_FUNC_GPIO &pcfg_pull_up>;
+               };
+       };
+
        pcfg_pull_none_drv_8ma: pcfg-pull-none-drv-8ma {
                drive-strength = <8>;
        };
                };
        };
 
+       sdio-pwrseq {
+               wifi_enable_h: wifi-enable-h {
+                       rockchip,pins = <4 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>;
+               };
+       };
+
        sdmmc {
                sdmmc_bus4: sdmmc-bus4 {
                        rockchip,pins =
        };
 };
 
+&sdio_pwrseq {
+       /*
+        * On the module itself this is one of these (depending
+        * on the actual card populated):
+        * - SDIO_RESET_L_WL_REG_ON
+        * - PDN (power down when low)
+        */
+       reset-gpios = <&gpio4 RK_PD4 GPIO_ACTIVE_LOW>;  /* WIFI_REG_ON */
+};
+
 &usbphy {
        status = "okay";
 };
index e1cb426f2aa53543890b73b71eb851a4ce7b1c37..8823c924dc1d643e850855cc528c4a51aab86bef 100644 (file)
@@ -13,8 +13,9 @@
        compatible = "vamrs,rk3399pro-vmarc-som", "rockchip,rk3399pro";
 
        aliases {
-               mmc0 = &sdmmc;
-               mmc1 = &sdhci;
+               ethernet0 = &gmac;
+               mmc0 = &sdhci;
+               mmc1 = &sdmmc;
        };
 
        vcc3v3_pcie: vcc-pcie-regulator {
        clock-frequency = <400000>;
        status = "okay";
 
-       hym8563: hym8563@51 {
+       hym8563: rtc@51 {
                compatible = "haoyu,hym8563";
                reg = <0x51>;
                #clock-cells = <0>;
-               clock-frequency = <32768>;
                clock-output-names = "hym8563";
                pinctrl-names = "default";
                pinctrl-0 = <&hym8563_int>;
 
        pcie {
                pcie_pwr: pcie-pwr {
-                       rockchip,pins = <4 RK_PD4 RK_FUNC_GPIO &pcfg_pull_up>;
+                       rockchip,pins = <4 RK_PD4 RK_FUNC_GPIO &pcfg_pull_up>;
                };
        };
 
        pmu1830-supply = <&vcc_1v8>;
 };
 
+&sdio_pwrseq {
+       /*
+        * On the module itself this is one of these (depending
+        * on the actual card populated):
+        * - SDIO_RESET_L_WL_REG_ON
+        * - PDN (power down when low)
+        */
+       reset-gpios = <&gpio2 RK_PD3 GPIO_ACTIVE_LOW>;
+};
+
 &sdhci {
        bus-width = <8>;
        mmc-hs400-1_8v;
index 26b53eac470688dcc8f7a1eed38a87ac881e156c..da1d548b7330cd8d4cf97f36b7c305f6c527ecff 100644 (file)
                #clock-cells = <0>;
        };
 
+       sdio_pwrseq: sdio-pwrseq {
+               compatible = "mmc-pwrseq-simple";
+               clocks = <&hym8563>;
+               clock-names = "ext_clock";
+               pinctrl-names = "default";
+               pinctrl-0 = <&wifi_enable_h>;
+       };
+
        vcc12v_dcin: vcc12v-dcin-regulator {
                compatible = "regulator-fixed";
                regulator-name = "vcc12v_dcin";
        status = "okay";
 };
 
+&sdio0 {
+       bus-width = <4>;
+       cap-sd-highspeed;
+       cap-sdio-irq;
+       keep-power-in-suspend;
+       mmc-pwrseq = <&sdio_pwrseq>;
+       non-removable;
+       pinctrl-names = "default";
+       pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
+       sd-uhs-sdr104;
+       status = "okay";
+};
+
 &sdmmc {
        bus-width = <4>;
        cap-mmc-highspeed;
index 234d0c9ab0f5d2cc592dee6b2e0a4754ae1790f8..6d93b9e580039057c60da159cae0c3dbc7a3a382 100644 (file)
@@ -2,7 +2,6 @@ CONFIG_ARM=y
 CONFIG_SKIP_LOWLEVEL_INIT=y
 CONFIG_COUNTER_FREQUENCY=24000000
 CONFIG_ARCH_ROCKCHIP=y
-CONFIG_SPL_GPIO=y
 CONFIG_NR_DRAM_BANKS=1
 CONFIG_ENV_OFFSET=0x3F8000
 CONFIG_DEFAULT_DEVICE_TREE="rk3399pro-rock-pi-n10"
@@ -18,7 +17,7 @@ CONFIG_DEBUG_UART=y
 CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399pro-rock-pi-n10.dtb"
 # CONFIG_CONSOLE_MUX is not set
 CONFIG_DISPLAY_BOARDINFO_LATE=y
-CONFIG_SPL_MAX_SIZE=0x2e000
+CONFIG_SPL_MAX_SIZE=0x40000
 CONFIG_SPL_PAD_TO=0x7f8000
 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
 CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
@@ -36,17 +35,20 @@ CONFIG_ENV_IS_IN_MMC=y
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_ROCKCHIP_GPIO=y
 CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_ROCKCHIP_IODOMAIN=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_SDMA=y
 CONFIG_MMC_SDHCI_ROCKCHIP=y
+CONFIG_PHY_REALTEK=y
+CONFIG_DM_ETH_PHY=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_GMAC_ROCKCHIP=y
 CONFIG_NVME_PCI=y
 CONFIG_PHY_ROCKCHIP_INNO_USB2=y
 CONFIG_PHY_ROCKCHIP_TYPEC=y
 CONFIG_PMIC_RK8XX=y
-CONFIG_REGULATOR_PWM=y
 CONFIG_REGULATOR_RK8XX=y
 CONFIG_PWM_ROCKCHIP=y
 # CONFIG_RAM_ROCKCHIP_DEBUG is not set