]> git.dujemihanovic.xyz Git - u-boot.git/commitdiff
net: eepro100: Remove EEPRO100_SROM_WRITE
authorMarek Vasut <marek.vasut+renesas@gmail.com>
Sat, 23 May 2020 11:06:48 +0000 (13:06 +0200)
committerMarek Vasut <marek.vasut+renesas@gmail.com>
Thu, 18 Jun 2020 17:34:39 +0000 (19:34 +0200)
This code is never enabled, last board that used it was ELPPC which
was removed some 5 years ago, so just remove this code altogether.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
README
drivers/net/eepro100.c
scripts/config_whitelist.txt

diff --git a/README b/README
index bcf19836311143bc93f18af744beaac0e29c4651..b49154076e99d6c95bddc53e1a16b2baa5e5dfd4 100644 (file)
--- a/README
+++ b/README
@@ -891,8 +891,6 @@ The following options need to be configured:
 
                CONFIG_EEPRO100
                Support for Intel 82557/82559/82559ER chips.
-               Optional CONFIG_EEPRO100_SROM_WRITE enables EEPROM
-               write routine for first time initialisation.
 
                CONFIG_TULIP
                Support for Digital 2114x chips.
index e186ab4e5f24d8183712c3e21b748eb9f4475d29..62a0dc75229983872e27f832969908d985658830 100644 (file)
@@ -781,93 +781,6 @@ static int read_eeprom (struct eth_device *dev, int location, int addr_len)
        return retval;
 }
 
-#ifdef CONFIG_EEPRO100_SROM_WRITE
-int eepro100_write_eeprom (struct eth_device* dev, int location, int addr_len, unsigned short data)
-{
-    unsigned short dataval;
-    int enable_cmd = 0x3f | EE_EWENB_CMD;
-    int write_cmd  = location | EE_WRITE_CMD;
-    int i;
-    unsigned long datalong, tmplong;
-
-    OUTW(dev, EE_ENB & ~EE_CS, SCBeeprom);
-    udelay(1);
-    OUTW(dev, EE_ENB, SCBeeprom);
-
-    /* Shift the enable command bits out. */
-    for (i = (addr_len+EE_CMD_BITS-1); i >= 0; i--)
-    {
-       dataval = (enable_cmd & (1 << i)) ? EE_DATA_WRITE : 0;
-       OUTW(dev, EE_ENB | dataval, SCBeeprom);
-       udelay(1);
-       OUTW(dev, EE_ENB | dataval | EE_SHIFT_CLK, SCBeeprom);
-       udelay(1);
-    }
-
-    OUTW(dev, EE_ENB, SCBeeprom);
-    udelay(1);
-    OUTW(dev, EE_ENB & ~EE_CS, SCBeeprom);
-    udelay(1);
-    OUTW(dev, EE_ENB, SCBeeprom);
-
-
-    /* Shift the write command bits out. */
-    for (i = (addr_len+EE_CMD_BITS-1); i >= 0; i--)
-    {
-       dataval = (write_cmd & (1 << i)) ? EE_DATA_WRITE : 0;
-       OUTW(dev, EE_ENB | dataval, SCBeeprom);
-       udelay(1);
-       OUTW(dev, EE_ENB | dataval | EE_SHIFT_CLK, SCBeeprom);
-       udelay(1);
-    }
-
-    /* Write the data */
-    datalong= (unsigned long) ((((data) & 0x00ff) << 8) | ( (data) >> 8));
-
-    for (i = 0; i< EE_DATA_BITS; i++)
-    {
-    /* Extract and move data bit to bit DI */
-    dataval = ((datalong & 0x8000)>>13) ? EE_DATA_WRITE : 0;
-
-    OUTW(dev, EE_ENB | dataval, SCBeeprom);
-    udelay(1);
-    OUTW(dev, EE_ENB | dataval | EE_SHIFT_CLK, SCBeeprom);
-    udelay(1);
-    OUTW(dev, EE_ENB | dataval, SCBeeprom);
-    udelay(1);
-
-    datalong = datalong << 1;  /* Adjust significant data bit*/
-    }
-
-    /* Finish up command  (toggle CS) */
-    OUTW(dev, EE_ENB & ~EE_CS, SCBeeprom);
-    udelay(1);                 /* delay for more than 250 ns */
-    OUTW(dev, EE_ENB, SCBeeprom);
-
-    /* Wait for programming ready (D0 = 1) */
-    tmplong = 10;
-    do
-    {
-       dataval = INW(dev, SCBeeprom);
-       if (dataval & EE_DATA_READ)
-           break;
-       udelay(10000);
-    }
-    while (-- tmplong);
-
-    if (tmplong == 0)
-    {
-       printf ("Write i82559 eeprom timed out (100 ms waiting for data ready.\n");
-       return -1;
-    }
-
-    /* Terminate the EEPROM access. */
-    OUTW(dev, EE_ENB & ~EE_CS, SCBeeprom);
-
-    return 0;
-}
-#endif
-
 static void init_rx_ring (struct eth_device *dev)
 {
        int i;
index 2210f46e446988590c89db4fe6273740fd3d8ac7..86350ab9c857debcb52128c0deaa6c9433f6d858 100644 (file)
@@ -400,7 +400,6 @@ CONFIG_EDB93XX_SDCS1
 CONFIG_EDB93XX_SDCS2
 CONFIG_EDB93XX_SDCS3
 CONFIG_EEPRO100
-CONFIG_EEPRO100_SROM_WRITE
 CONFIG_EFLASH_PROTSECTORS
 CONFIG_EHCI_DESC_BIG_ENDIAN
 CONFIG_EHCI_HCD_INIT_AFTER_RESET