ARM: uniphier: sync with Linux 5.8-rc4

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

diff --git a/arch/arm/dts/uniphier-ld11-global.dts b/arch/arm/dts/uniphier-ld11-global.dts
index 7968d524351b3e83ce227784164cf690f5daa158..670e1a76dbb6606bf3d41bb6885f3b3b2f1ea385 100644 (file)
--- a/arch/arm/dts/uniphier-ld11-global.dts
+++ b/arch/arm/dts/uniphier-ld11-global.dts
@@ -30,6 +30,7 @@
                i2c3 = &i2c3;
                i2c4 = &i2c4;
                i2c5 = &i2c5;
+               ethernet0 = ð
        };
 
        memory@80000000 {

diff --git a/arch/arm/dts/uniphier-ld11-ref.dts b/arch/arm/dts/uniphier-ld11-ref.dts
index b8f62734844809a08e15917a5ee738a8403a9c7b..693171f82ff12590ebc2081d17707a0ddaa0bf65 100644 (file)
--- a/arch/arm/dts/uniphier-ld11-ref.dts
+++ b/arch/arm/dts/uniphier-ld11-ref.dts
@@ -29,6 +29,7 @@
                i2c3 = &i2c3;
                i2c4 = &i2c4;
                i2c5 = &i2c5;
+               ethernet0 = ð
        };
 
        memory@80000000 {

diff --git a/arch/arm/dts/uniphier-ld11.dtsi b/arch/arm/dts/uniphier-ld11.dtsi
index e0737ac7f06c13596b7f92db811c4c9f3a50f5ed..104d56d625d42a36e034d41418e0831b6923c825 100644 (file)
--- a/arch/arm/dts/uniphier-ld11.dtsi
+++ b/arch/arm/dts/uniphier-ld11.dtsi
@@ -129,6 +129,8 @@
                        compatible = "socionext,uniphier-scssi";
                        status = "disabled";
                        reg = <0x54006000 0x100>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
                        interrupts = <0 39 4>;
                        pinctrl-names = "default";
                        pinctrl-0 = <&pinctrl_spi0>;
@@ -140,11 +142,13 @@
                        compatible = "socionext,uniphier-scssi";
                        status = "disabled";
                        reg = <0x54006100 0x100>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
                        interrupts = <0 216 4>;
                        pinctrl-names = "default";
                        pinctrl-0 = <&pinctrl_spi1>;
-                       clocks = <&peri_clk 11>;
-                       resets = <&peri_rst 11>;
+                       clocks = <&peri_clk 12>;
+                       resets = <&peri_rst 12>;
                };
 
                serial0: serial@54006800 {
@@ -566,6 +570,14 @@
                        };
                };
 
+               xdmac: dma-controller@5fc10000 {
+                       compatible = "socionext,uniphier-xdmac";
+                       reg = <0x5fc10000 0x5300>;
+                       interrupts = <0 188 4>;
+                       dma-channels = <16>;
+                       #dma-cells = <2>;
+               };
+
                aidet: interrupt-controller@5fc20000 {
                        compatible = "socionext,uniphier-ld11-aidet";
                        reg = <0x5fc20000 0x200>;

diff --git a/arch/arm/dts/uniphier-ld20-global.dts b/arch/arm/dts/uniphier-ld20-global.dts
index 9ca692ed1b2bd5775c9b89b258a2c3391bde9546..2c000082667c47c78a5f60a3e7c49cd1cc06f335 100644 (file)
--- a/arch/arm/dts/uniphier-ld20-global.dts
+++ b/arch/arm/dts/uniphier-ld20-global.dts
@@ -30,6 +30,7 @@
                i2c3 = &i2c3;
                i2c4 = &i2c4;
                i2c5 = &i2c5;
+               ethernet0 = ð
        };
 
        memory@80000000 {

diff --git a/arch/arm/dts/uniphier-ld20-ref.dts b/arch/arm/dts/uniphier-ld20-ref.dts
index 406244a5c8e8527647972b6233d81af86fc975a3..eeb976e7892d5a6c8a4dd16642378c9e7220fd50 100644 (file)
--- a/arch/arm/dts/uniphier-ld20-ref.dts
+++ b/arch/arm/dts/uniphier-ld20-ref.dts
@@ -29,6 +29,7 @@
                i2c3 = &i2c3;
                i2c4 = &i2c4;
                i2c5 = &i2c5;
+               ethernet0 = ð
        };
 
        memory@80000000 {

diff --git a/arch/arm/dts/uniphier-ld20.dtsi b/arch/arm/dts/uniphier-ld20.dtsi
index 59e4191dfc39b5d2d9b40d7d3831658b14bbd43f..a5cd026838061e65cdd21adf3554a8ba98d234f3 100644 (file)
--- a/arch/arm/dts/uniphier-ld20.dtsi
+++ b/arch/arm/dts/uniphier-ld20.dtsi
@@ -234,6 +234,8 @@
                        compatible = "socionext,uniphier-scssi";
                        status = "disabled";
                        reg = <0x54006000 0x100>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
                        interrupts = <0 39 4>;
                        pinctrl-names = "default";
                        pinctrl-0 = <&pinctrl_spi0>;
@@ -245,33 +247,39 @@
                        compatible = "socionext,uniphier-scssi";
                        status = "disabled";
                        reg = <0x54006100 0x100>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
                        interrupts = <0 216 4>;
                        pinctrl-names = "default";
                        pinctrl-0 = <&pinctrl_spi1>;
-                       clocks = <&peri_clk 11>;
-                       resets = <&peri_rst 11>;
+                       clocks = <&peri_clk 12>;
+                       resets = <&peri_rst 12>;
                };
 
                spi2: spi@54006200 {
                        compatible = "socionext,uniphier-scssi";
                        status = "disabled";
                        reg = <0x54006200 0x100>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
                        interrupts = <0 229 4>;
                        pinctrl-names = "default";
                        pinctrl-0 = <&pinctrl_spi2>;
-                       clocks = <&peri_clk 11>;
-                       resets = <&peri_rst 11>;
+                       clocks = <&peri_clk 13>;
+                       resets = <&peri_rst 13>;
                };
 
                spi3: spi@54006300 {
                        compatible = "socionext,uniphier-scssi";
                        status = "disabled";
                        reg = <0x54006300 0x100>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
                        interrupts = <0 230 4>;
                        pinctrl-names = "default";
                        pinctrl-0 = <&pinctrl_spi3>;
-                       clocks = <&peri_clk 11>;
-                       resets = <&peri_rst 11>;
+                       clocks = <&peri_clk 14>;
+                       resets = <&peri_rst 14>;
                };
 
                serial0: serial@54006800 {
@@ -664,6 +672,14 @@
                        };
                };
 
+               xdmac: dma-controller@5fc10000 {
+                       compatible = "socionext,uniphier-xdmac";
+                       reg = <0x5fc10000 0x5300>;
+                       interrupts = <0 188 4>;
+                       dma-channels = <16>;
+                       #dma-cells = <2>;
+               };
+
                aidet: interrupt-controller@5fc20000 {
                        compatible = "socionext,uniphier-ld20-aidet";
                        reg = <0x5fc20000 0x200>;

diff --git a/arch/arm/dts/uniphier-ld4.dtsi b/arch/arm/dts/uniphier-ld4.dtsi
index 1eebc7fa3bee50971ea303bdbedca951d9afa8e3..897162d5f50d4dbe27c7c21ab67452a7da56c3b9 100644 (file)
--- a/arch/arm/dts/uniphier-ld4.dtsi
+++ b/arch/arm/dts/uniphier-ld4.dtsi
@@ -67,6 +67,8 @@
                        compatible = "socionext,uniphier-scssi";
                        status = "disabled";
                        reg = <0x54006000 0x100>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
                        interrupts = <0 39 4>;
                        pinctrl-names = "default";
                        pinctrl-0 = <&pinctrl_spi0>;

diff --git a/arch/arm/dts/uniphier-ld6b-ref.dts b/arch/arm/dts/uniphier-ld6b-ref.dts
index 3d9080ee7aef73b5a1642757d5931b5345e698a6..f1a3b29bacd575f8e8768a03cbefe7499287d408 100644 (file)
--- a/arch/arm/dts/uniphier-ld6b-ref.dts
+++ b/arch/arm/dts/uniphier-ld6b-ref.dts
@@ -29,6 +29,7 @@
                i2c4 = &i2c4;
                i2c5 = &i2c5;
                i2c6 = &i2c6;
+               ethernet0 = ð
        };
 
        memory@80000000 {

diff --git a/arch/arm/dts/uniphier-pro4-ace.dts b/arch/arm/dts/uniphier-pro4-ace.dts
index 92cc48dd86d030ca59f68f96baa5746a6e4c94c6..64246fad325c148bca6c54e020a01008c8644bae 100644 (file)
--- a/arch/arm/dts/uniphier-pro4-ace.dts
+++ b/arch/arm/dts/uniphier-pro4-ace.dts
@@ -26,6 +26,7 @@
                i2c3 = &i2c3;
                i2c5 = &i2c5;
                i2c6 = &i2c6;
+               ethernet0 = ð
        };
 
        memory@80000000 {

diff --git a/arch/arm/dts/uniphier-pro4-ref.dts b/arch/arm/dts/uniphier-pro4-ref.dts
index 06065eb36cad1cfb21181c860f9922661cea79d2..4967db58c5c8e8041828917186eb1aed73881be2 100644 (file)
--- a/arch/arm/dts/uniphier-pro4-ref.dts
+++ b/arch/arm/dts/uniphier-pro4-ref.dts
@@ -30,6 +30,7 @@
                i2c5 = &i2c5;
                i2c6 = &i2c6;
                usb0 = &usb0;
+               ethernet0 = ð
        };
 
        memory@80000000 {

diff --git a/arch/arm/dts/uniphier-pro4.dtsi b/arch/arm/dts/uniphier-pro4.dtsi
index d006b45f7a3da250342359202e1123c730288568..9dae4e9b23fd5d07a4b2d46d219a17b99e26aa17 100644 (file)
--- a/arch/arm/dts/uniphier-pro4.dtsi
+++ b/arch/arm/dts/uniphier-pro4.dtsi
@@ -75,6 +75,8 @@
                        compatible = "socionext,uniphier-scssi";
                        status = "disabled";
                        reg = <0x54006000 0x100>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
                        interrupts = <0 39 4>;
                        pinctrl-names = "default";
                        pinctrl-0 = <&pinctrl_spi0>;
@@ -426,6 +428,14 @@
                        };
                };
 
+               xdmac: dma-controller@5fc10000 {
+                       compatible = "socionext,uniphier-xdmac";
+                       reg = <0x5fc10000 0x5300>;
+                       interrupts = <0 188 4>;
+                       dma-channels = <16>;
+                       #dma-cells = <2>;
+               };
+
                aidet: interrupt-controller@5fc20000 {
                        compatible = "socionext,uniphier-pro4-aidet";
                        reg = <0x5fc20000 0x200>;

diff --git a/arch/arm/dts/uniphier-pro5.dtsi b/arch/arm/dts/uniphier-pro5.dtsi
index ba7e224b38e6c2549698ab77989a6741e443c6cd..8fc8433a3cddef6de743be1b6f012e062d5d6967 100644 (file)
--- a/arch/arm/dts/uniphier-pro5.dtsi
+++ b/arch/arm/dts/uniphier-pro5.dtsi
@@ -160,6 +160,8 @@
                        compatible = "socionext,uniphier-scssi";
                        status = "disabled";
                        reg = <0x54006000 0x100>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
                        interrupts = <0 39 4>;
                        pinctrl-names = "default";
                        pinctrl-0 = <&pinctrl_spi0>;
@@ -171,11 +173,13 @@
                        compatible = "socionext,uniphier-scssi";
                        status = "disabled";
                        reg = <0x54006100 0x100>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
                        interrupts = <0 216 4>;
                        pinctrl-names = "default";
                        pinctrl-0 = <&pinctrl_spi1>;
-                       clocks = <&peri_clk 11>;
-                       resets = <&peri_rst 11>;
+                       clocks = <&peri_clk 11>;        /* common with spi0 */
+                       resets = <&peri_rst 12>;
                };
 
                serial0: serial@54006800 {
@@ -408,6 +412,14 @@
                        };
                };
 
+               xdmac: dma-controller@5fc10000 {
+                       compatible = "socionext,uniphier-xdmac";
+                       reg = <0x5fc10000 0x5300>;
+                       interrupts = <0 188 4>;
+                       dma-channels = <16>;
+                       #dma-cells = <2>;
+               };
+
                aidet: interrupt-controller@5fc20000 {
                        compatible = "socionext,uniphier-pro5-aidet";
                        reg = <0x5fc20000 0x200>;

diff --git a/arch/arm/dts/uniphier-pxs2-gentil.dts b/arch/arm/dts/uniphier-pxs2-gentil.dts
index e27fd4f2a5690802fb317eb5e9359c3804acbeaa..8e9ac579aa9aabba7a650d2a649070a3dcd14c28 100644 (file)
--- a/arch/arm/dts/uniphier-pxs2-gentil.dts
+++ b/arch/arm/dts/uniphier-pxs2-gentil.dts
@@ -26,6 +26,7 @@
                i2c4 = &i2c4;
                i2c5 = &i2c5;
                i2c6 = &i2c6;
+               ethernet0 = ð
        };
 
        memory@80000000 {

diff --git a/arch/arm/dts/uniphier-pxs2-vodka.dts b/arch/arm/dts/uniphier-pxs2-vodka.dts
index 23fe42b7408bb4036f0b588a852660aa2b5adb28..8eacc7bdecb765502562369293a8b38ae02a9451 100644 (file)
--- a/arch/arm/dts/uniphier-pxs2-vodka.dts
+++ b/arch/arm/dts/uniphier-pxs2-vodka.dts
@@ -24,6 +24,7 @@
                i2c4 = &i2c4;
                i2c5 = &i2c5;
                i2c6 = &i2c6;
+               ethernet0 = ð
        };
 
        memory@80000000 {

diff --git a/arch/arm/dts/uniphier-pxs2.dtsi b/arch/arm/dts/uniphier-pxs2.dtsi
index 8d968d3681023fdd013b4f28b93e18066fcb614b..899ff379c9b84fe7b8297bc6f23d4f8662a1573a 100644 (file)
--- a/arch/arm/dts/uniphier-pxs2.dtsi
+++ b/arch/arm/dts/uniphier-pxs2.dtsi
@@ -173,6 +173,8 @@
                        compatible = "socionext,uniphier-scssi";
                        status = "disabled";
                        reg = <0x54006000 0x100>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
                        interrupts = <0 39 4>;
                        pinctrl-names = "default";
                        pinctrl-0 = <&pinctrl_spi0>;
@@ -184,11 +186,13 @@
                        compatible = "socionext,uniphier-scssi";
                        status = "disabled";
                        reg = <0x54006100 0x100>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
                        interrupts = <0 216 4>;
                        pinctrl-names = "default";
                        pinctrl-0 = <&pinctrl_spi1>;
-                       clocks = <&peri_clk 11>;
-                       resets = <&peri_rst 11>;
+                       clocks = <&peri_clk 12>;
+                       resets = <&peri_rst 12>;
                };
 
                serial0: serial@54006800 {
@@ -508,6 +512,14 @@
                        };
                };
 
+               xdmac: dma-controller@5fc10000 {
+                       compatible = "socionext,uniphier-xdmac";
+                       reg = <0x5fc10000 0x5300>;
+                       interrupts = <0 188 4>;
+                       dma-channels = <16>;
+                       #dma-cells = <2>;
+               };
+
                aidet: interrupt-controller@5fc20000 {
                        compatible = "socionext,uniphier-pxs2-aidet";
                        reg = <0x5fc20000 0x200>;

diff --git a/arch/arm/dts/uniphier-pxs3-ref.dts b/arch/arm/dts/uniphier-pxs3-ref.dts
index 1965e4dfe4a4778de7b914605d8c78f96560f0d0..1dacbf4fb0ada94af4fc7b5acd0aff66c58f27ad 100644 (file)
--- a/arch/arm/dts/uniphier-pxs3-ref.dts
+++ b/arch/arm/dts/uniphier-pxs3-ref.dts
@@ -27,6 +27,10 @@
                i2c2 = &i2c2;
                i2c3 = &i2c3;
                i2c6 = &i2c6;
+               spi0 = &spi0;
+               spi1 = &spi1;
+               ethernet0 = &eth0;
+               ethernet1 = &eth1;
        };
 
        memory@80000000 {
@@ -39,6 +43,14 @@
        interrupts = <4 8>;
 };
 
+&spi0 {
+       status = "okay";
+};
+
+&spi1 {
+       status = "okay";
+};
+
 &serial0 {
        status = "okay";
 };
@@ -116,3 +128,19 @@
 &nand {
        status = "okay";
 };
+
+&pinctrl_ether_rgmii {
+       tx {
+               pins = "RGMII0_TXCLK", "RGMII0_TXD0", "RGMII0_TXD1",
+                      "RGMII0_TXD2", "RGMII0_TXD3", "RGMII0_TXCTL";
+               drive-strength = <9>;
+       };
+};
+
+&pinctrl_ether1_rgmii {
+       tx {
+               pins = "RGMII1_TXCLK", "RGMII1_TXD0", "RGMII1_TXD1",
+                      "RGMII1_TXD2", "RGMII1_TXD3", "RGMII1_TXCTL";
+               drive-strength = <9>;
+       };
+};

diff --git a/arch/arm/dts/uniphier-pxs3.dtsi b/arch/arm/dts/uniphier-pxs3.dtsi
index ed079c171137bd3903fed074afa22dafbb20b1ce..bf3b1eae874166c686c80e4d53b29b9c479258a2 100644 (file)
--- a/arch/arm/dts/uniphier-pxs3.dtsi
+++ b/arch/arm/dts/uniphier-pxs3.dtsi
@@ -7,6 +7,7 @@
 
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/gpio/uniphier-gpio.h>
+#include <dt-bindings/thermal/thermal.h>
 
 / {
        compatible = "socionext,uniphier-pxs3";
@@ -42,6 +43,7 @@
                        clocks = <&sys_clk 33>;
                        enable-method = "psci";
                        operating-points-v2 = <&cluster0_opp>;
+                       #cooling-cells = <2>;
                };
 
                cpu1: cpu@1 {
@@ -51,6 +53,7 @@
                        clocks = <&sys_clk 33>;
                        enable-method = "psci";
                        operating-points-v2 = <&cluster0_opp>;
+                       #cooling-cells = <2>;
                };
 
                cpu2: cpu@2 {
@@ -60,6 +63,7 @@
                        clocks = <&sys_clk 33>;
                        enable-method = "psci";
                        operating-points-v2 = <&cluster0_opp>;
+                       #cooling-cells = <2>;
                };
 
                cpu3: cpu@3 {
@@ -69,6 +73,7 @@
                        clocks = <&sys_clk 33>;
                        enable-method = "psci";
                        operating-points-v2 = <&cluster0_opp>;
+                       #cooling-cells = <2>;
                };
        };
 
@@ -136,6 +141,37 @@
                             <1 10 4>;
        };
 
+       thermal-zones {
+               cpu-thermal {
+                       polling-delay-passive = <250>;  /* 250ms */
+                       polling-delay = <1000>;         /* 1000ms */
+                       thermal-sensors = <&pvtctl>;
+
+                       trips {
+                               cpu_crit: cpu-crit {
+                                       temperature = <110000>; /* 110C */
+                                       hysteresis = <2000>;
+                                       type = "critical";
+                               };
+                               cpu_alert: cpu-alert {
+                                       temperature = <100000>; /* 100C */
+                                       hysteresis = <2000>;
+                                       type = "passive";
+                               };
+                       };
+
+                       cooling-maps {
+                               map0 {
+                                       trip = <&cpu_alert>;
+                                       cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                                                        <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                                                        <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                                                        <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+                               };
+                       };
+               };
+       };
+
        reserved-memory {
                #address-cells = <2>;
                #size-cells = <2>;
@@ -157,6 +193,8 @@
                        compatible = "socionext,uniphier-scssi";
                        status = "disabled";
                        reg = <0x54006000 0x100>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
                        interrupts = <0 39 4>;
                        pinctrl-names = "default";
                        pinctrl-0 = <&pinctrl_spi0>;
@@ -168,11 +206,13 @@
                        compatible = "socionext,uniphier-scssi";
                        status = "disabled";
                        reg = <0x54006100 0x100>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
                        interrupts = <0 216 4>;
                        pinctrl-names = "default";
                        pinctrl-0 = <&pinctrl_spi1>;
-                       clocks = <&peri_clk 11>;
-                       resets = <&peri_rst 11>;
+                       clocks = <&peri_clk 12>;
+                       resets = <&peri_rst 12>;
                };
 
                serial0: serial@54006800 {
@@ -462,6 +502,14 @@
                        };
                };
 
+               xdmac: dma-controller@5fc10000 {
+                       compatible = "socionext,uniphier-xdmac";
+                       reg = <0x5fc10000 0x5300>;
+                       interrupts = <0 188 4>;
+                       dma-channels = <16>;
+                       #dma-cells = <2>;
+               };
+
                aidet: interrupt-controller@5fc20000 {
                        compatible = "socionext,uniphier-pxs3-aidet";
                        reg = <0x5fc20000 0x200>;
@@ -496,6 +544,13 @@
                        watchdog {
                                compatible = "socionext,uniphier-wdt";
                        };
+
+                       pvtctl: pvtctl {
+                               compatible = "socionext,uniphier-pxs3-thermal";
+                               interrupts = <0 3 4>;
+                               #thermal-sensor-cells = <0>;
+                               socionext,tmod-calibration = <0x0f22 0x68ee>;
+                       };
                };
 
                eth0: ethernet@65000000 {

diff --git a/arch/arm/dts/uniphier-sld8.dtsi b/arch/arm/dts/uniphier-sld8.dtsi
index 393157eb14ed19e252112fa75e83350ffcc32856..93ddebbae47ca8053c29bca89f1893b65dbd81f6 100644 (file)
--- a/arch/arm/dts/uniphier-sld8.dtsi
+++ b/arch/arm/dts/uniphier-sld8.dtsi
@@ -67,6 +67,8 @@
                        compatible = "socionext,uniphier-scssi";
                        status = "disabled";
                        reg = <0x54006000 0x100>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
                        interrupts = <0 39 4>;
                        pinctrl-names = "default";
                        pinctrl-0 = <&pinctrl_spi0>;