ppc4xx: Setup HICB on Io64

The FPGA High-Speed Interconnect Bus (HICB) is now setup by u-boot.

Signed-off-by: Dirk Eibach <eibach@gdsys.de>
Signed-off-by: Stefan Roese <sr@denx.de>

diff --git a/board/gdsys/405ex/io64.c b/board/gdsys/405ex/io64.c
index a997571f0ba2de9556689b7188ac0cc9731b3ee1..177141dcc36cf94260932fea76c2a0dc1abc44b2 100644 (file)
--- a/board/gdsys/405ex/io64.c
+++ b/board/gdsys/405ex/io64.c
@@ -249,6 +249,7 @@ int last_stage_init(void)
        char str_serdes[] = "Start SERDES blocks";
        char str_channels[] = "Start FPGA channels";
        char str_locks[] = "Verify SERDES locks";
+       char str_hicb[] = "Verify HICB status";
        char str_status[] = "Verify PHY status -";
        char slash[] = "\\|/-\\|/-";
 
@@ -312,6 +313,21 @@ int last_stage_init(void)
        }
        blank_string(strlen(str_locks));
 
+       /* verify hicb_status */
+       puts(str_hicb);
+       for (fpga = 0; fpga < 2; ++fpga) {
+               u16 *ch0_hicb_status_int = &(fpga ? fpga1 : fpga0)->ch0_hicb_status_int;
+               for (k = 0; k < 32; ++k) {
+                       u16 status = in_le16(ch0_hicb_status_int + 4*k);
+                       if (status)
+                               printf("fpga %d hicb %d: hicb status %04x\n",
+                                       fpga, k, status);
+                       /* reset events */
+                       out_le16(ch0_hicb_status_int + 4*k, status);
+               }
+       }
+       blank_string(strlen(str_hicb));
+
        /* verify phy status */
        puts(str_status);
        for (k = 0; k < 32; ++k) {

diff --git a/include/gdsys_fpga.h b/include/gdsys_fpga.h
index e7a072bbe8b59595bde8a010e23f077292d3500d..949864c0f28d2e34bea130b353777b1b260f46e5 100644 (file)
--- a/include/gdsys_fpga.h
+++ b/include/gdsys_fpga.h
@@ -82,7 +82,10 @@ typedef struct ihs_fpga {
        u16 reserved_1[502];    /* 0x0014 */
        u16 ch0_status_int;     /* 0x0400 */
        u16 ch0_config_int;     /* 0x0402 */
-       u16 reserved_2[7677];   /* 0x0404 */
+       u16 reserved_2[126];    /* 0x0404 */
+       u16 ch0_hicb_status_int;/* 0x0500 */
+       u16 ch0_hicb_config_int;/* 0x0502 */
+       u16 reserved_3[7549];   /* 0x0504 */
        u16 reflection_high;    /* 0x3ffe */
 } ihs_fpga_t;
 #endif