imx8m: soc: enable SCTR clock before timer init

To i.MX8MM SCTR clock is disabled by ROM, so before timer init
need to enable it.
To i.MX8MQ, it does not hurt the clock is enabled again.

Signed-off-by: Peng Fan <peng.fan@nxp.com>

diff --git a/arch/arm/mach-imx/imx8m/soc.c b/arch/arm/mach-imx/imx8m/soc.c
index a33ca356532760a6695de7571ee7c5e188d0af3c..ac80266010d21346e9e5ef990f9e3e194b1db637 100644 (file)
--- a/arch/arm/mach-imx/imx8m/soc.c
+++ b/arch/arm/mach-imx/imx8m/soc.c
@@ -231,6 +231,12 @@ static void imx_set_wdog_powerdown(bool enable)
 int arch_cpu_init(void)
 {
        struct ocotp_regs *ocotp = (struct ocotp_regs *)OCOTP_BASE_ADDR;
+       /*
+        * ROM might disable clock for SCTR,
+        * enable the clock before timer_init.
+        */
+       if (IS_ENABLED(CONFIG_SPL_BUILD))
+               clock_enable(CCGR_SCTR, 1);
        /*
         * Init timer at very early state, because sscg pll setting
         * will use it