omap: emif: Set initial DDR PHY config first

Commit "OMAP5: emif/ddr: Change emif settings as required for ES1.0 silicon"
(f40107345cbcd6e0d1747eda45e76c4e2a6df0db)
changed sequence to set final DDR PHY config register value at the beginning.
Looks like it was made by mistake and should be reverted.

Signed-off-by: Taras Kondratiuk <taras@ti.com>

diff --git a/arch/arm/cpu/armv7/omap-common/emif-common.c b/arch/arm/cpu/armv7/omap-common/emif-common.c
index ece365507c21510f8953299e0a12a5ad91798d09..b0e1caa356b6982924b11aad371a7f420ea57d75 100644 (file)
--- a/arch/arm/cpu/armv7/omap-common/emif-common.c
+++ b/arch/arm/cpu/armv7/omap-common/emif-common.c
@@ -153,7 +153,7 @@ static void lpddr2_init(u32 base, const struct emif_regs *regs)
         * un-locked frequency & default RL
         */
        writel(regs->sdram_config_init, &emif->emif_sdram_config);
-       writel(regs->emif_ddr_phy_ctlr_1, &emif->emif_ddr_phy_ctrl_1);
+       writel(regs->emif_ddr_phy_ctlr_1_init, &emif->emif_ddr_phy_ctrl_1);
 
        do_ext_phy_settings(base, regs);