CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_MVPP2=y
-CONFIG_NVME=y
+CONFIG_NVME_PCI=y
CONFIG_PCI=y
CONFIG_PCIE_DW_MVEBU=y
CONFIG_PHY=y
CONFIG_DM_ETH=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_GMAC_ROCKCHIP=y
-CONFIG_NVME=y
+CONFIG_NVME_PCI=y
CONFIG_PCI=y
CONFIG_PMIC_RK8XX=y
CONFIG_REGULATOR_PWM=y
CONFIG_DM_MDIO_MUX=y
CONFIG_ETH_DESIGNWARE_MESON8B=y
CONFIG_MDIO_MUX_MESON_G12A=y
-CONFIG_NVME=y
+CONFIG_NVME_PCI=y
CONFIG_PCI=y
CONFIG_PCIE_DW_MESON=y
CONFIG_MESON_G12A_USB_PHY=y
CONFIG_DM_MDIO_MUX=y
CONFIG_ETH_DESIGNWARE_MESON8B=y
CONFIG_MDIO_MUX_MESON_G12A=y
-CONFIG_NVME=y
+CONFIG_NVME_PCI=y
CONFIG_PCI=y
CONFIG_PCIE_DW_MESON=y
CONFIG_MESON_G12A_USB_PHY=y
CONFIG_DM_MDIO_MUX=y
CONFIG_ETH_DESIGNWARE_MESON8B=y
CONFIG_MDIO_MUX_MESON_G12A=y
-CONFIG_NVME=y
+CONFIG_NVME_PCI=y
CONFIG_PCI=y
CONFIG_PCIE_DW_MESON=y
CONFIG_MESON_G12A_USB_PHY=y
CONFIG_DM_MDIO_MUX=y
CONFIG_ETH_DESIGNWARE_MESON8B=y
CONFIG_MDIO_MUX_MESON_G12A=y
-CONFIG_NVME=y
+CONFIG_NVME_PCI=y
CONFIG_PCI=y
CONFIG_PCIE_DW_MESON=y
CONFIG_MESON_G12A_USB_PHY=y
CONFIG_DM_MDIO_MUX=y
CONFIG_ETH_DESIGNWARE_MESON8B=y
CONFIG_MDIO_MUX_MESON_G12A=y
-CONFIG_NVME=y
+CONFIG_NVME_PCI=y
CONFIG_PCI=y
CONFIG_PCIE_DW_MESON=y
CONFIG_MESON_G12A_USB_PHY=y
CONFIG_DM_MDIO_MUX=y
CONFIG_ETH_DESIGNWARE_MESON8B=y
CONFIG_MDIO_MUX_MESON_G12A=y
-CONFIG_NVME=y
+CONFIG_NVME_PCI=y
CONFIG_PCI=y
CONFIG_PCIE_DW_MESON=y
CONFIG_MESON_G12A_USB_PHY=y
CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_MSCC_FELIX_SWITCH=y
-CONFIG_NVME=y
+CONFIG_NVME_PCI=y
CONFIG_PCIE_ECAM_GENERIC=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_RTC_RV8803=y
CONFIG_FSL_PFE=y
CONFIG_DM_ETH=y
CONFIG_E1000=y
-CONFIG_NVME=y
+CONFIG_NVME_PCI=y
CONFIG_PCI=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_DM_RTC=y
CONFIG_FSL_PFE=y
CONFIG_DM_ETH=y
CONFIG_E1000=y
-CONFIG_NVME=y
+CONFIG_NVME_PCI=y
CONFIG_PCI=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_DM_RTC=y
CONFIG_FSL_PFE=y
CONFIG_DM_ETH=y
CONFIG_E1000=y
-CONFIG_NVME=y
+CONFIG_NVME_PCI=y
CONFIG_PCI=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_DM_RTC=y
CONFIG_FSL_PFE=y
CONFIG_DM_ETH=y
CONFIG_E1000=y
-CONFIG_NVME=y
+CONFIG_NVME_PCI=y
CONFIG_PCI=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_DM_RTC=y
CONFIG_FSL_PFE=y
CONFIG_DM_ETH=y
CONFIG_E1000=y
-CONFIG_NVME=y
+CONFIG_NVME_PCI=y
CONFIG_PCI=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_DM_RTC=y
CONFIG_FSL_PFE=y
CONFIG_DM_ETH=y
CONFIG_E1000=y
-CONFIG_NVME=y
+CONFIG_NVME_PCI=y
CONFIG_PCI=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_DM_RTC=y
CONFIG_FSL_PFE=y
CONFIG_DM_ETH=y
CONFIG_E1000=y
-CONFIG_NVME=y
+CONFIG_NVME_PCI=y
CONFIG_PCI=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_DM_RTC=y
CONFIG_FSL_PFE=y
CONFIG_DM_ETH=y
CONFIG_E1000=y
-CONFIG_NVME=y
+CONFIG_NVME_PCI=y
CONFIG_PCI=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_DM_RTC=y
CONFIG_FSL_PFE=y
CONFIG_DM_ETH=y
CONFIG_E1000=y
-CONFIG_NVME=y
+CONFIG_NVME_PCI=y
CONFIG_PCI=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_DM_RTC=y
CONFIG_SPI_FLASH_SPANSION=y
# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
CONFIG_E1000=y
-CONFIG_NVME=y
+CONFIG_NVME_PCI=y
CONFIG_PCI=y
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_FSL_PFE=y
CONFIG_DM_ETH=y
CONFIG_E1000=y
-CONFIG_NVME=y
+CONFIG_NVME_PCI=y
CONFIG_PCI=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_DM_RTC=y
CONFIG_FSL_PFE=y
CONFIG_DM_ETH=y
CONFIG_E1000=y
-CONFIG_NVME=y
+CONFIG_NVME_PCI=y
CONFIG_PCI=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_DM_RTC=y
CONFIG_FSL_PFE=y
CONFIG_DM_ETH=y
CONFIG_E1000=y
-CONFIG_NVME=y
+CONFIG_NVME_PCI=y
CONFIG_PCI=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_DM_RTC=y
CONFIG_E1000=y
CONFIG_MII=y
CONFIG_TSEC_ENET=y
-CONFIG_NVME=y
+CONFIG_NVME_PCI=y
CONFIG_PCI=y
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_E1000=y
CONFIG_MII=y
CONFIG_TSEC_ENET=y
-CONFIG_NVME=y
+CONFIG_NVME_PCI=y
CONFIG_PCI=y
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_E1000=y
CONFIG_MII=y
CONFIG_TSEC_ENET=y
-CONFIG_NVME=y
+CONFIG_NVME_PCI=y
CONFIG_PCI=y
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_E1000=y
CONFIG_MII=y
CONFIG_TSEC_ENET=y
-CONFIG_NVME=y
+CONFIG_NVME_PCI=y
CONFIG_PCI=y
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_E1000=y
CONFIG_MII=y
CONFIG_TSEC_ENET=y
-CONFIG_NVME=y
+CONFIG_NVME_PCI=y
CONFIG_PCI=y
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_E1000=y
CONFIG_MII=y
CONFIG_TSEC_ENET=y
-CONFIG_NVME=y
+CONFIG_NVME_PCI=y
CONFIG_PCI=y
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_E1000=y
CONFIG_MII=y
CONFIG_TSEC_ENET=y
-CONFIG_NVME=y
+CONFIG_NVME_PCI=y
CONFIG_PCI=y
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_E1000=y
CONFIG_MII=y
CONFIG_TSEC_ENET=y
-CONFIG_NVME=y
+CONFIG_NVME_PCI=y
CONFIG_PCI=y
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_E1000=y
CONFIG_MII=y
CONFIG_TSEC_ENET=y
-CONFIG_NVME=y
+CONFIG_NVME_PCI=y
CONFIG_PCI=y
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_E1000=y
CONFIG_MII=y
CONFIG_TSEC_ENET=y
-CONFIG_NVME=y
+CONFIG_NVME_PCI=y
CONFIG_PCI=y
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_E1000=y
CONFIG_MII=y
CONFIG_TSEC_ENET=y
-CONFIG_NVME=y
+CONFIG_NVME_PCI=y
CONFIG_PCI=y
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_MII=y
CONFIG_SJA1105=y
CONFIG_TSEC_ENET=y
-CONFIG_NVME=y
+CONFIG_NVME_PCI=y
CONFIG_PCI=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_SCSI_AHCI_PLAT=y
CONFIG_MII=y
CONFIG_SJA1105=y
CONFIG_TSEC_ENET=y
-CONFIG_NVME=y
+CONFIG_NVME_PCI=y
CONFIG_PCI=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_SCSI_AHCI_PLAT=y
CONFIG_E1000=y
CONFIG_MII=y
CONFIG_TSEC_ENET=y
-CONFIG_NVME=y
+CONFIG_NVME_PCI=y
CONFIG_PCI=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_SYS_QE_FW_ADDR=0x60940000
CONFIG_E1000=y
CONFIG_MII=y
CONFIG_TSEC_ENET=y
-CONFIG_NVME=y
+CONFIG_NVME_PCI=y
CONFIG_PCI=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_SYS_QE_FW_ADDR=0x60940000
CONFIG_E1000=y
CONFIG_MII=y
CONFIG_TSEC_ENET=y
-CONFIG_NVME=y
+CONFIG_NVME_PCI=y
CONFIG_PCI=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_SYS_QE_FW_ADDR=0x60940000
CONFIG_E1000=y
CONFIG_MII=y
CONFIG_TSEC_ENET=y
-CONFIG_NVME=y
+CONFIG_NVME_PCI=y
CONFIG_PCI=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_DM_SCSI=y
CONFIG_E1000=y
CONFIG_MII=y
CONFIG_TSEC_ENET=y
-CONFIG_NVME=y
+CONFIG_NVME_PCI=y
CONFIG_PCI=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_DM_SCSI=y
CONFIG_E1000=y
CONFIG_MII=y
CONFIG_TSEC_ENET=y
-CONFIG_NVME=y
+CONFIG_NVME_PCI=y
CONFIG_PCI=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_DM_SCSI=y
CONFIG_E1000=y
CONFIG_MSCC_FELIX_SWITCH=y
CONFIG_MDIO_MUX_I2CREG=y
-CONFIG_NVME=y
+CONFIG_NVME_PCI=y
CONFIG_PCI=y
CONFIG_PCIE_ECAM_GENERIC=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_E1000=y
CONFIG_MSCC_FELIX_SWITCH=y
CONFIG_MDIO_MUX_I2CREG=y
-CONFIG_NVME=y
+CONFIG_NVME_PCI=y
CONFIG_PCI=y
CONFIG_PCIE_ECAM_GENERIC=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_E1000=y
CONFIG_FSL_ENETC=y
CONFIG_MDIO_MUX_I2CREG=y
-CONFIG_NVME=y
+CONFIG_NVME_PCI=y
CONFIG_PCI=y
CONFIG_PCIE_ECAM_GENERIC=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_MSCC_FELIX_SWITCH=y
-CONFIG_NVME=y
+CONFIG_NVME_PCI=y
CONFIG_PCI=y
CONFIG_PCIE_ECAM_GENERIC=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_MSCC_FELIX_SWITCH=y
-CONFIG_NVME=y
+CONFIG_NVME_PCI=y
CONFIG_PCI=y
CONFIG_PCIE_ECAM_GENERIC=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_E1000=y
CONFIG_FMAN_ENET=y
CONFIG_SYS_FMAN_FW_ADDR=0x60900000
-CONFIG_NVME=y
+CONFIG_NVME_PCI=y
CONFIG_PCI=y
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_E1000=y
CONFIG_FMAN_ENET=y
CONFIG_SYS_FMAN_FW_ADDR=0x60900000
-CONFIG_NVME=y
+CONFIG_NVME_PCI=y
CONFIG_PCI=y
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_E1000=y
CONFIG_FMAN_ENET=y
CONFIG_SYS_FMAN_FW_ADDR=0x900000
-CONFIG_NVME=y
+CONFIG_NVME_PCI=y
CONFIG_PCI=y
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_E1000=y
CONFIG_FMAN_ENET=y
CONFIG_SYS_FMAN_FW_ADDR=0x60900000
-CONFIG_NVME=y
+CONFIG_NVME_PCI=y
CONFIG_PCI=y
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_E1000=y
CONFIG_FMAN_ENET=y
CONFIG_SYS_FMAN_FW_ADDR=0x40900000
-CONFIG_NVME=y
+CONFIG_NVME_PCI=y
CONFIG_PCI=y
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_E1000=y
CONFIG_FMAN_ENET=y
CONFIG_SYS_FMAN_FW_ADDR=0x900000
-CONFIG_NVME=y
+CONFIG_NVME_PCI=y
CONFIG_PCI=y
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_E1000=y
CONFIG_FMAN_ENET=y
CONFIG_SYS_FMAN_FW_ADDR=0x900000
-CONFIG_NVME=y
+CONFIG_NVME_PCI=y
CONFIG_PCI=y
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_E1000=y
CONFIG_FMAN_ENET=y
CONFIG_SYS_FMAN_FW_ADDR=0x900000
-CONFIG_NVME=y
+CONFIG_NVME_PCI=y
CONFIG_PCI=y
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_E1000=y
CONFIG_FMAN_ENET=y
CONFIG_SYS_FMAN_FW_ADDR=0x900000
-CONFIG_NVME=y
+CONFIG_NVME_PCI=y
CONFIG_PCI=y
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_E1000=y
CONFIG_FMAN_ENET=y
CONFIG_SYS_FMAN_FW_ADDR=0x60900000
-CONFIG_NVME=y
+CONFIG_NVME_PCI=y
CONFIG_PCI=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_SYS_QE_FW_ADDR=0x60940000
CONFIG_E1000=y
CONFIG_FMAN_ENET=y
CONFIG_SYS_FMAN_FW_ADDR=0x60900000
-CONFIG_NVME=y
+CONFIG_NVME_PCI=y
CONFIG_PCI=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_SYS_QE_FW_ADDR=0x60940000
CONFIG_E1000=y
CONFIG_FMAN_ENET=y
CONFIG_SYS_FMAN_FW_ADDR=0x900000
-CONFIG_NVME=y
+CONFIG_NVME_PCI=y
CONFIG_PCI=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_SYS_QE_FMAN_FW_IN_NAND=y
CONFIG_E1000=y
CONFIG_FMAN_ENET=y
CONFIG_SYS_FMAN_FW_ADDR=0x900000
-CONFIG_NVME=y
+CONFIG_NVME_PCI=y
CONFIG_PCI=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_SYS_QE_FMAN_FW_IN_NAND=y
CONFIG_E1000=y
CONFIG_FMAN_ENET=y
CONFIG_SYS_FMAN_FW_ADDR=0x900000
-CONFIG_NVME=y
+CONFIG_NVME_PCI=y
CONFIG_PCI=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_SYS_QE_FW_ADDR=0x940000
CONFIG_E1000=y
CONFIG_FMAN_ENET=y
CONFIG_SYS_FMAN_FW_ADDR=0x900000
-CONFIG_NVME=y
+CONFIG_NVME_PCI=y
CONFIG_PCI=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_SYS_QE_FW_ADDR=0x940000
CONFIG_E1000=y
CONFIG_FMAN_ENET=y
CONFIG_SYS_FMAN_FW_ADDR=0x900000
-CONFIG_NVME=y
+CONFIG_NVME_PCI=y
CONFIG_PCI=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_SYS_QE_FW_ADDR=0x940000
CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_FMAN_ENET=y
-CONFIG_NVME=y
+CONFIG_NVME_PCI=y
CONFIG_PCI=y
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_E1000=y
CONFIG_FMAN_ENET=y
CONFIG_SYS_FMAN_FW_ADDR=0x60900000
-CONFIG_NVME=y
+CONFIG_NVME_PCI=y
CONFIG_PCI=y
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_E1000=y
CONFIG_FMAN_ENET=y
CONFIG_SYS_FMAN_FW_ADDR=0x60900000
-CONFIG_NVME=y
+CONFIG_NVME_PCI=y
CONFIG_PCI=y
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_E1000=y
CONFIG_FMAN_ENET=y
CONFIG_SYS_FMAN_FW_ADDR=0x60900000
-CONFIG_NVME=y
+CONFIG_NVME_PCI=y
CONFIG_PCI=y
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_E1000=y
CONFIG_FMAN_ENET=y
CONFIG_SYS_FMAN_FW_ADDR=0x900000
-CONFIG_NVME=y
+CONFIG_NVME_PCI=y
CONFIG_PCI=y
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_E1000=y
CONFIG_FMAN_ENET=y
CONFIG_SYS_FMAN_FW_ADDR=0x40900000
-CONFIG_NVME=y
+CONFIG_NVME_PCI=y
CONFIG_PCI=y
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_E1000=y
CONFIG_FMAN_ENET=y
CONFIG_SYS_FMAN_FW_ADDR=0x900000
-CONFIG_NVME=y
+CONFIG_NVME_PCI=y
CONFIG_PCI=y
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_E1000=y
CONFIG_FMAN_ENET=y
CONFIG_SYS_FMAN_FW_ADDR=0x900000
-CONFIG_NVME=y
+CONFIG_NVME_PCI=y
CONFIG_PCI=y
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_E1000=y
CONFIG_FMAN_ENET=y
CONFIG_SYS_FMAN_FW_ADDR=0x900000
-CONFIG_NVME=y
+CONFIG_NVME_PCI=y
CONFIG_PCI=y
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_E1000=y
CONFIG_FMAN_ENET=y
CONFIG_SYS_FMAN_FW_ADDR=0x900000
-CONFIG_NVME=y
+CONFIG_NVME_PCI=y
CONFIG_PCI=y
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_E1000=y
CONFIG_FMAN_ENET=y
CONFIG_SYS_FMAN_FW_ADDR=0x900000
-CONFIG_NVME=y
+CONFIG_NVME_PCI=y
CONFIG_PCI=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_PCIE_LAYERSCAPE_EP=y
CONFIG_E1000=y
CONFIG_FMAN_ENET=y
CONFIG_SYS_FMAN_FW_ADDR=0x40900000
-CONFIG_NVME=y
+CONFIG_NVME_PCI=y
CONFIG_PCI=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_PCIE_LAYERSCAPE_EP=y
CONFIG_E1000=y
CONFIG_FMAN_ENET=y
CONFIG_SYS_FMAN_FW_ADDR=0x40900000
-CONFIG_NVME=y
+CONFIG_NVME_PCI=y
CONFIG_PCI=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_PCIE_LAYERSCAPE_EP=y
CONFIG_E1000=y
CONFIG_FMAN_ENET=y
CONFIG_SYS_FMAN_FW_ADDR=0x40900000
-CONFIG_NVME=y
+CONFIG_NVME_PCI=y
CONFIG_PCI=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_PCIE_LAYERSCAPE_EP=y
CONFIG_E1000=y
CONFIG_FMAN_ENET=y
CONFIG_SYS_FMAN_FW_ADDR=0x900000
-CONFIG_NVME=y
+CONFIG_NVME_PCI=y
CONFIG_PCI=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_PCIE_LAYERSCAPE_EP=y
CONFIG_E1000=y
CONFIG_FMAN_ENET=y
CONFIG_SYS_FMAN_FW_ADDR=0x900000
-CONFIG_NVME=y
+CONFIG_NVME_PCI=y
CONFIG_PCI=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_PCIE_LAYERSCAPE_EP=y
CONFIG_E1000=y
CONFIG_FMAN_ENET=y
CONFIG_SYS_FMAN_FW_ADDR=0x900000
-CONFIG_NVME=y
+CONFIG_NVME_PCI=y
CONFIG_PCI=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_PCIE_LAYERSCAPE_EP=y
CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_MII=y
-CONFIG_NVME=y
+CONFIG_NVME_PCI=y
CONFIG_PCI=y
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_MII=y
-CONFIG_NVME=y
+CONFIG_NVME_PCI=y
CONFIG_PCI=y
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_MII=y
-CONFIG_NVME=y
+CONFIG_NVME_PCI=y
CONFIG_PCI=y
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_MII=y
-CONFIG_NVME=y
+CONFIG_NVME_PCI=y
CONFIG_PCI=y
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_MII=y
-CONFIG_NVME=y
+CONFIG_NVME_PCI=y
CONFIG_PCI=y
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_MII=y
CONFIG_MDIO_MUX_I2CREG=y
CONFIG_FSL_LS_MDIO=y
-CONFIG_NVME=y
+CONFIG_NVME_PCI=y
CONFIG_PCI=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_DM_RTC=y
CONFIG_E1000=y
CONFIG_MII=y
CONFIG_FSL_LS_MDIO=y
-CONFIG_NVME=y
+CONFIG_NVME_PCI=y
CONFIG_PCI=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_DM_SCSI=y
CONFIG_E1000=y
CONFIG_MII=y
CONFIG_FSL_LS_MDIO=y
-CONFIG_NVME=y
+CONFIG_NVME_PCI=y
CONFIG_PCI=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_DM_SCSI=y
CONFIG_E1000=y
CONFIG_MII=y
CONFIG_FSL_LS_MDIO=y
-CONFIG_NVME=y
+CONFIG_NVME_PCI=y
CONFIG_PCI=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_DM_SCSI=y
CONFIG_E1000=y
CONFIG_MII=y
CONFIG_FSL_LS_MDIO=y
-CONFIG_NVME=y
+CONFIG_NVME_PCI=y
CONFIG_PCI=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_DM_RTC=y
CONFIG_E1000=y
CONFIG_MII=y
CONFIG_FSL_LS_MDIO=y
-CONFIG_NVME=y
+CONFIG_NVME_PCI=y
CONFIG_PCI=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_DM_RTC=y
CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_MII=y
-CONFIG_NVME=y
+CONFIG_NVME_PCI=y
CONFIG_PCI=y
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_MII=y
-CONFIG_NVME=y
+CONFIG_NVME_PCI=y
CONFIG_PCI=y
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_MII=y
-CONFIG_NVME=y
+CONFIG_NVME_PCI=y
CONFIG_PCI=y
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_MII=y
-CONFIG_NVME=y
+CONFIG_NVME_PCI=y
CONFIG_PCI=y
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_MII=y
-CONFIG_NVME=y
+CONFIG_NVME_PCI=y
CONFIG_PCI=y
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_CORTINA_FW_ADDR=0x580980000
CONFIG_E1000=y
CONFIG_MII=y
-CONFIG_NVME=y
+CONFIG_NVME_PCI=y
CONFIG_PCI=y
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_CORTINA_FW_ADDR=0x580980000
CONFIG_E1000=y
CONFIG_MII=y
-CONFIG_NVME=y
+CONFIG_NVME_PCI=y
CONFIG_PCI=y
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_CORTINA_FW_ADDR=0x980000
CONFIG_E1000=y
CONFIG_MII=y
-CONFIG_NVME=y
+CONFIG_NVME_PCI=y
CONFIG_PCI=y
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_CORTINA_FW_ADDR=0x980000
CONFIG_E1000=y
CONFIG_MII=y
-CONFIG_NVME=y
+CONFIG_NVME_PCI=y
CONFIG_PCI=y
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_MII=y
CONFIG_MDIO_MUX_I2CREG=y
CONFIG_FSL_LS_MDIO=y
-CONFIG_NVME=y
+CONFIG_NVME_PCI=y
CONFIG_PCI=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_DM_RTC=y
CONFIG_E1000=y
CONFIG_MII=y
CONFIG_FSL_LS_MDIO=y
-CONFIG_NVME=y
+CONFIG_NVME_PCI=y
CONFIG_PCI=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_DM_SCSI=y
CONFIG_E1000=y
CONFIG_MII=y
CONFIG_FSL_LS_MDIO=y
-CONFIG_NVME=y
+CONFIG_NVME_PCI=y
CONFIG_PCI=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_DM_SCSI=y
CONFIG_E1000=y
CONFIG_MII=y
CONFIG_FSL_LS_MDIO=y
-CONFIG_NVME=y
+CONFIG_NVME_PCI=y
CONFIG_PCI=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_DM_RTC=y
CONFIG_E1000=y
CONFIG_MII=y
CONFIG_FSL_LS_MDIO=y
-CONFIG_NVME=y
+CONFIG_NVME_PCI=y
CONFIG_PCI=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_DM_RTC=y
CONFIG_MII=y
CONFIG_MDIO_MUX_I2CREG=y
CONFIG_FSL_LS_MDIO=y
-CONFIG_NVME=y
+CONFIG_NVME_PCI=y
CONFIG_PCI=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_PCIE_LAYERSCAPE_GEN4=y
CONFIG_MII=y
CONFIG_MDIO_MUX_I2CREG=y
CONFIG_FSL_LS_MDIO=y
-CONFIG_NVME=y
+CONFIG_NVME_PCI=y
CONFIG_PCI=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_PCIE_LAYERSCAPE_GEN4=y
CONFIG_E1000=y
CONFIG_MII=y
CONFIG_FSL_LS_MDIO=y
-CONFIG_NVME=y
+CONFIG_NVME_PCI=y
CONFIG_PCI=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_PCIE_LAYERSCAPE_GEN4=y
CONFIG_E1000=y
CONFIG_MII=y
CONFIG_FSL_LS_MDIO=y
-CONFIG_NVME=y
+CONFIG_NVME_PCI=y
CONFIG_PCI=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_PCIE_LAYERSCAPE_GEN4=y
CONFIG_E1000=y
CONFIG_MII=y
CONFIG_FSL_LS_MDIO=y
-CONFIG_NVME=y
+CONFIG_NVME_PCI=y
CONFIG_PCI=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_PCIE_LAYERSCAPE_GEN4=y
CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_MVPP2=y
-CONFIG_NVME=y
+CONFIG_NVME_PCI=y
CONFIG_PCI=y
CONFIG_PCIE_DW_MVEBU=y
CONFIG_PHY=y
CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_MVPP2=y
-CONFIG_NVME=y
+CONFIG_NVME_PCI=y
CONFIG_PCI=y
CONFIG_PCIE_DW_MVEBU=y
CONFIG_PHY=y
CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_MVPP2=y
-CONFIG_NVME=y
+CONFIG_NVME_PCI=y
CONFIG_PCI=y
CONFIG_PCIE_DW_MVEBU=y
CONFIG_PHY=y
CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_MVNETA=y
-CONFIG_NVME=y
+CONFIG_NVME_PCI=y
CONFIG_PCI=y
CONFIG_PCI_AARDVARK=y
CONFIG_PHY=y
CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_MVPP2=y
-CONFIG_NVME=y
+CONFIG_NVME_PCI=y
CONFIG_PCI=y
CONFIG_PCIE_DW_MVEBU=y
CONFIG_PHY=y
CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_MVPP2=y
-CONFIG_NVME=y
+CONFIG_NVME_PCI=y
CONFIG_PCI=y
CONFIG_PCIE_DW_MVEBU=y
CONFIG_PHY=y
CONFIG_DM_ETH=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_GMAC_ROCKCHIP=y
-CONFIG_NVME=y
+CONFIG_NVME_PCI=y
CONFIG_PCI=y
CONFIG_PMIC_RK8XX=y
CONFIG_REGULATOR_PWM=y
CONFIG_CMD_E1000=y
CONFIG_NET_OCTEONTX2=y
CONFIG_OCTEONTX_SMI=y
-CONFIG_NVME=y
+CONFIG_NVME_PCI=y
CONFIG_PCI=y
CONFIG_PCI_REGION_MULTI_ENTRY=y
CONFIG_PCI_SRIOV=y
CONFIG_CMD_E1000=y
CONFIG_NET_OCTEONTX=y
CONFIG_OCTEONTX_SMI=y
-CONFIG_NVME=y
+CONFIG_NVME_PCI=y
CONFIG_PCI=y
CONFIG_PCI_REGION_MULTI_ENTRY=y
CONFIG_PCI_SRIOV=y
CONFIG_CMD_E1000=y
CONFIG_NET_OCTEONTX=y
CONFIG_OCTEONTX_SMI=y
-CONFIG_NVME=y
+CONFIG_NVME_PCI=y
CONFIG_PCI=y
CONFIG_PCI_REGION_MULTI_ENTRY=y
CONFIG_PCI_SRIOV=y
CONFIG_SF_DEFAULT_SPEED=24000000
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_RTL8169=y
-CONFIG_NVME=y
+CONFIG_NVME_PCI=y
CONFIG_PCI=y
CONFIG_PCI_TEGRA=y
CONFIG_SYS_NS16550=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_DM_ETH=y
-CONFIG_NVME=y
+CONFIG_NVME_PCI=y
CONFIG_PCI=y
CONFIG_PHY_ROCKCHIP_INNO_USB2=y
CONFIG_PHY_ROCKCHIP_TYPEC=y
CONFIG_SYS_ATA_ALT_OFFSET=0
CONFIG_ATAPI=y
CONFIG_CPU=y
-CONFIG_NVME=y
+CONFIG_NVME_PCI=y
CONFIG_SPL_DM_RTC=y
CONFIG_SPI=y
CONFIG_USB_KEYBOARD=y
CONFIG_SYS_ATA_ALT_OFFSET=0
CONFIG_ATAPI=y
CONFIG_CPU=y
-CONFIG_NVME=y
+CONFIG_NVME_PCI=y
CONFIG_SPI=y
CONFIG_USB_KEYBOARD=y
CONFIG_FRAMEBUFFER_SET_VESA_MODE=y
CONFIG_SYS_MAX_FLASH_BANKS_DETECT=y
CONFIG_DM_ETH=y
CONFIG_E1000=y
-CONFIG_NVME=y
+CONFIG_NVME_PCI=y
CONFIG_PCI=y
CONFIG_PCIE_ECAM_GENERIC=y
CONFIG_SCSI=y
CONFIG_SYS_MAX_FLASH_BANKS_DETECT=y
CONFIG_DM_ETH=y
CONFIG_E1000=y
-CONFIG_NVME=y
+CONFIG_NVME_PCI=y
CONFIG_PCI=y
CONFIG_PCIE_ECAM_GENERIC=y
CONFIG_SCSI=y
CONFIG_PHY_MICREL_KSZ90X1=y
CONFIG_DM_ETH=y
CONFIG_RENESAS_RAVB=y
-CONFIG_NVME=y
+CONFIG_NVME_PCI=y
CONFIG_PCI=y
CONFIG_PCI_REGION_MULTI_ENTRY=y
CONFIG_PCI_RCAR_GEN3=y
CONFIG_DM_ETH=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_GMAC_ROCKCHIP=y
-CONFIG_NVME=y
+CONFIG_NVME_PCI=y
CONFIG_PCI=y
CONFIG_PHY_ROCKCHIP_INNO_USB2=y
CONFIG_PHY_ROCKCHIP_TYPEC=y
CONFIG_DM_ETH=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_GMAC_ROCKCHIP=y
-CONFIG_NVME=y
+CONFIG_NVME_PCI=y
CONFIG_PCI=y
CONFIG_PHY_ROCKCHIP_INNO_USB2=y
CONFIG_PHY_ROCKCHIP_TYPEC=y
CONFIG_DM_ETH=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_GMAC_ROCKCHIP=y
-CONFIG_NVME=y
+CONFIG_NVME_PCI=y
CONFIG_PCI=y
CONFIG_PHY_ROCKCHIP_INNO_USB2=y
CONFIG_PHY_ROCKCHIP_TYPEC=y
CONFIG_DM_ETH=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_GMAC_ROCKCHIP=y
-CONFIG_NVME=y
+CONFIG_NVME_PCI=y
CONFIG_PCI=y
CONFIG_PHY_ROCKCHIP_INNO_USB2=y
CONFIG_PHY_ROCKCHIP_TYPEC=y
CONFIG_MMC_SDHCI_SDMA=y
CONFIG_MMC_SDHCI_ROCKCHIP=y
CONFIG_DM_ETH=y
-CONFIG_NVME=y
+CONFIG_NVME_PCI=y
CONFIG_PCI=y
CONFIG_PHY_ROCKCHIP_INNO_USB2=y
CONFIG_PHY_ROCKCHIP_TYPEC=y
CONFIG_DM_ETH=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_GMAC_ROCKCHIP=y
-CONFIG_NVME=y
+CONFIG_NVME_PCI=y
CONFIG_PCI=y
CONFIG_PHY_ROCKCHIP_INNO_USB2=y
CONFIG_PHY_ROCKCHIP_TYPEC=y
CONFIG_SPI_FLASH_SST=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_DM_ETH=y
-CONFIG_NVME=y
+CONFIG_NVME_PCI=y
CONFIG_PCI=y
CONFIG_PCI_SANDBOX=y
CONFIG_PHY=y
CONFIG_MULTIPLEXER=y
CONFIG_MUX_MMIO=y
CONFIG_DM_ETH=y
-CONFIG_NVME=y
+CONFIG_NVME_PCI=y
CONFIG_PCI=y
CONFIG_PCI_REGION_MULTI_ENTRY=y
CONFIG_PCI_SANDBOX=y
CONFIG_SPI_FLASH_SST=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_DM_ETH=y
-CONFIG_NVME=y
+CONFIG_NVME_PCI=y
CONFIG_PCI=y
CONFIG_PCI_REGION_MULTI_ENTRY=y
CONFIG_PCI_SANDBOX=y
CONFIG_SPI_FLASH_SST=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_DM_ETH=y
-CONFIG_NVME=y
+CONFIG_NVME_PCI=y
CONFIG_PCI=y
CONFIG_PCI_SANDBOX=y
CONFIG_PHY=y
CONFIG_SPI_FLASH_SST=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_DM_ETH=y
-CONFIG_NVME=y
+CONFIG_NVME_PCI=y
CONFIG_PCI=y
CONFIG_PCI_SANDBOX=y
CONFIG_PHY=y
CONFIG_SYS_I2C_EEPROM_ADDR=0x54
CONFIG_SPI_FLASH_ISSI=y
CONFIG_E1000=y
-CONFIG_NVME=y
+CONFIG_NVME_PCI=y
CONFIG_PCI=y
CONFIG_PCIE_DW_SIFIVE=y
CONFIG_DM_RESET=y
CONFIG_RGMII=y
CONFIG_MII=y
CONFIG_SNI_NETSEC=y
-CONFIG_NVME=y
+CONFIG_NVME_PCI=y
CONFIG_DM_RTC=y
CONFIG_RTC_PCF8563=y
CONFIG_SCSI=y
CONFIG_PHY_MARVELL=y
CONFIG_PHY_GIGE=y
CONFIG_MVNETA=y
-CONFIG_NVME=y
+CONFIG_NVME_PCI=y
CONFIG_PCI=y
CONFIG_PCI_AARDVARK=y
CONFIG_PHY=y
CONFIG_PHY_GIGE=y
CONFIG_MVNETA=y
CONFIG_MII=y
-CONFIG_NVME=y
+CONFIG_NVME_PCI=y
CONFIG_PCI=y
CONFIG_PCI_MVEBU=y
CONFIG_DM_RTC=y
Config options
--------------
CONFIG_NVME Enable NVMe device support
+CONFIG_NVME_PCI Enable PCIe NVMe device support
CONFIG_CMD_NVME Enable basic NVMe commands
Usage in U-Boot
config NVME
bool "NVM Express device support"
- depends on BLK && PCI
+ depends on BLK
select HAVE_BLOCK_DEVICE
help
This option enables support for NVM Express devices.
It supports basic functions of NVMe (read/write).
+
+config NVME_PCI
+ bool "NVM Express PCI device support"
+ depends on PCI
+ select NVME
+ help
+ This option enables support for NVM Express PCI
+ devices.
# Copyright (C) 2017, Bin Meng <bmeng.cn@gmail.com>
obj-y += nvme-uclass.o nvme.o nvme_show.o
+obj-$(CONFIG_NVME_PCI) += nvme_pci.o
#include <log.h>
#include <malloc.h>
#include <memalign.h>
-#include <pci.h>
#include <time.h>
#include <dm/device-internal.h>
#include <linux/compat.h>
struct blk_desc *desc = dev_get_uclass_plat(udev);
struct nvme_ns *ns = dev_get_priv(udev);
u8 flbas;
- struct pci_child_plat *pplat;
struct nvme_id_ns *id;
id = memalign(ndev->page_size, sizeof(struct nvme_id_ns));
desc->log2blksz = ns->lba_shift;
desc->blksz = 1 << ns->lba_shift;
desc->bdev = udev;
- pplat = dev_get_parent_plat(udev->parent);
- sprintf(desc->vendor, "0x%.4x", pplat->vendor);
+ memcpy(desc->vendor, ndev->vendor, sizeof(ndev->vendor));
memcpy(desc->product, ndev->serial, sizeof(ndev->serial));
memcpy(desc->revision, ndev->firmware_rev, sizeof(ndev->firmware_rev));
.priv_auto = sizeof(struct nvme_ns),
};
-static int nvme_bind(struct udevice *udev)
+int nvme_init(struct udevice *udev)
{
- static int ndev_num;
- char name[20];
-
- sprintf(name, "nvme#%d", ndev_num++);
-
- return device_set_name(udev, name);
-}
-
-static int nvme_probe(struct udevice *udev)
-{
- int ret;
struct nvme_dev *ndev = dev_get_priv(udev);
struct nvme_id_ns *id;
-
- ndev->instance = trailing_strtol(udev->name);
+ int ret;
INIT_LIST_HEAD(&ndev->namespaces);
- ndev->bar = dm_pci_map_bar(udev, PCI_BASE_ADDRESS_0,
- PCI_REGION_MEM);
if (readl(&ndev->bar->csts) == -1) {
ret = -ENODEV;
printf("Error: %s: Out of memory!\n", udev->name);
free_nvme:
return ret;
}
-
-U_BOOT_DRIVER(nvme) = {
- .name = "nvme",
- .id = UCLASS_NVME,
- .bind = nvme_bind,
- .probe = nvme_probe,
- .priv_auto = sizeof(struct nvme_dev),
-};
-
-struct pci_device_id nvme_supported[] = {
- { PCI_DEVICE_CLASS(PCI_CLASS_STORAGE_EXPRESS, ~0) },
- {}
-};
-
-U_BOOT_PCI_DEVICE(nvme, nvme_supported);
u32 ctrl_config;
struct nvme_bar __iomem *bar;
struct list_head namespaces;
+ char vendor[8];
char serial[20];
char model[40];
char firmware_rev[8];
u8 flbas;
};
+int nvme_init(struct udevice *udev);
+
#endif /* __DRIVER_NVME_H__ */
--- /dev/null
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2017 NXP Semiconductors
+ * Copyright (C) 2017 Bin Meng <bmeng.cn@gmail.com>
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <pci.h>
+#include "nvme.h"
+
+static int nvme_bind(struct udevice *udev)
+{
+ static int ndev_num;
+ char name[20];
+
+ sprintf(name, "nvme#%d", ndev_num++);
+
+ return device_set_name(udev, name);
+}
+
+static int nvme_probe(struct udevice *udev)
+{
+ struct nvme_dev *ndev = dev_get_priv(udev);
+ struct pci_child_plat *pplat;
+
+ pplat = dev_get_parent_plat(udev);
+ sprintf(ndev->vendor, "0x%.4x", pplat->vendor);
+
+ ndev->instance = trailing_strtol(udev->name);
+ ndev->bar = dm_pci_map_bar(udev, PCI_BASE_ADDRESS_0,
+ PCI_REGION_MEM);
+ return nvme_init(udev);
+}
+
+U_BOOT_DRIVER(nvme) = {
+ .name = "nvme",
+ .id = UCLASS_NVME,
+ .bind = nvme_bind,
+ .probe = nvme_probe,
+ .priv_auto = sizeof(struct nvme_dev),
+};
+
+struct pci_device_id nvme_supported[] = {
+ { PCI_DEVICE_CLASS(PCI_CLASS_STORAGE_EXPRESS, ~0) },
+ {}
+};
+
+U_BOOT_PCI_DEVICE(nvme, nvme_supported);