]> git.dujemihanovic.xyz Git - u-boot.git/commitdiff
board: cssi: Load CMPC885's motherboard FPGA earlier
authorChristophe Leroy <christophe.leroy@csgroup.eu>
Wed, 3 May 2023 06:38:16 +0000 (08:38 +0200)
committerChristophe Leroy <christophe.leroy@csgroup.eu>
Thu, 4 May 2023 08:58:07 +0000 (10:58 +0200)
In order to know the motherboard type earlier, perform I/O ports
initialisation and FPGA loading in board_early_init_f() instead
of board_early_init_r().

This is needed to be able to load mpc8xx CPM microcode base on
motherboard type and before starting to use the CPM.

Console is not available yet so remove the printfs.

Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
board/cssi/cmpc885/cmpc885.c
configs/CMPC885_defconfig

index 02da4d9a87ae277f6bad2e90a0f882cc3e9b9d2e..40128f170a280e285c7c825aaf394b14a82a40aa 100644 (file)
@@ -586,13 +586,8 @@ void iop_setup_miae(void)
        setbits_be32(&cp->cp_peso, 0x00031980);
 }
 
-int board_early_init_f(void)
-{
-       return 0;
-}
-
 /* Specific board initialization */
-int board_early_init_r(void)
+int board_early_init_f(void)
 {
        immap_t __iomem *immr = (immap_t __iomem *)CONFIG_SYS_IMMR;
        iop8xx_t __iomem *iop = &immr->im_ioport;
@@ -864,8 +859,6 @@ int board_early_init_r(void)
 
                /* Check if fpga firmware is loaded */
                if (!(in_be32(&cp->cp_pedat) & 0x00000001)) {
-                       printf("Reloading FPGA firmware.\n");
-
                        /* Load fpga firmware */
                        /* Activate PROG_FPGA_FIRMWARE for 1 usec */
                        clrbits_be32(&cp->cp_pedat, 0x00000002);
@@ -874,12 +867,8 @@ int board_early_init_r(void)
 
                        /* Wait 200 msec and check DONE_FPGA_FIRMWARE */
                        mdelay(200);
-                       if (!(in_be32(&cp->cp_pedat) & 0x00000001)) {
-                               for (;;) {
-                                       printf("error loading firmware.\n");
-                                       mdelay(500);
-                               }
-                       }
+                       if (!(in_be32(&cp->cp_pedat) & 0x00000001))
+                               hang();
 
                        /* Send a reset signal and wait for 20 msec */
                        clrbits_be16(ADDR_CPLD_R_RESET, R_RST_STATUS);
@@ -889,12 +878,8 @@ int board_early_init_r(void)
 
                /* Wait 300 msec and check the reset state */
                mdelay(300);
-               if (!(in_be16(ADDR_CPLD_R_RESET) & R_RESET_STATUS)) {
-                       for (;;) {
-                               printf("Could not reset FPGA.\n");
-                               mdelay(500);
-                       }
-               }
+               if (!(in_be16(ADDR_CPLD_R_RESET) & R_RESET_STATUS))
+                       hang();
 
                iop_setup_common();
        } else {
index 0a2468438999405b403b791364dea4bf206f1fca..ca5dfd2b83c0f197260fda55f3a8c970da46c95a 100644 (file)
@@ -31,7 +31,6 @@ CONFIG_AUTOBOOT_STOP_STR_ENABLE=y
 CONFIG_AUTOBOOT_STOP_STR_SHA256="4813494d137e1631bba301d5acab6e7bb7aa74ce1185d456565ef51d737677b2"
 CONFIG_USE_BOOTCOMMAND=y
 CONFIG_BOOTCOMMAND="run flashboot"
-CONFIG_BOARD_EARLY_INIT_R=y
 CONFIG_MISC_INIT_R=y
 CONFIG_HUSH_PARSER=y
 # CONFIG_CMD_BDI is not set