ram: rk3399: Configure PHY_898, PHY_919 for lpddr4

PHY_898, PHY_919 would require to configure PHY LP4 boot
pll control and ca for lpddr4.

So, configure the same in pctl_cfg for LPDDR4.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: YouMin Chen <cym@rock-chips.com>
Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>

diff --git a/drivers/ram/rockchip/sdram_rk3399.c b/drivers/ram/rockchip/sdram_rk3399.c
index 8b2c6b3cdbdaf04a6aaf1ac4a08b226bf562fb46..aaf786a03e070fba683313d92a82b2f02168d7a2 100644 (file)
--- a/drivers/ram/rockchip/sdram_rk3399.c
+++ b/drivers/ram/rockchip/sdram_rk3399.c
@@ -574,6 +574,11 @@ static int pctl_cfg(struct dram_info *dram, const struct chan_info *chan,
        writel(params->phy_regs.denali_phy[911], &denali_phy[911]);
        writel(params->phy_regs.denali_phy[912], &denali_phy[912]);
 
+       if (IS_ENABLED(CONFIG_RAM_RK3399_LPDDR4)) {
+               writel(params->phy_regs.denali_phy[898], &denali_phy[898]);
+               writel(params->phy_regs.denali_phy[919], &denali_phy[919]);
+       }
+
        dram->pwrup_srefresh_exit[channel] = readl(&denali_ctl[68]) &
                                             PWRUP_SREFRESH_EXIT;
        clrbits_le32(&denali_ctl[68], PWRUP_SREFRESH_EXIT);