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(parent: 2519cb3) | patch
mpc85xx/t208xqds: Adjust DDR timing parameters
authorYork Sun <yorksun@freescale.com>
Mon, 27 Oct 2014 18:31:32 +0000 (11:31 -0700)
committerYork Sun <yorksun@freescale.com>
Fri, 5 Dec 2014 16:06:08 +0000 (08:06 -0800)
commited9e4e427295623197d8dd76a1ca9ac15e085572
tree406d2f16e72d4406d8516fcd1bfb4de330bb3bb9tree | snapshot
parent2519cb344ee7911ab2f6643449f5dcc32cec9653commit | diff
mpc85xx/t208xqds: Adjust DDR timing parameters

Adjust timing for dual-rank UDIMM, verified on M3CQ-8GHS3C0E for speed of
1066, 1333, 1600, 1866MT/s. The 1866 timing is copied to 2133 timing in
case such DIMM comes available.

Also update single-rank 1866 timing. Enable interactive debugging as well.

Signed-off-by: York Sun <yorksun@freescale.com>
CC: Shengzhou Liu <Shengzhou.Liu@freescale.com>
board/freescale/t208xqds/ddr.h diff | blob | history
include/configs/T208xQDS.h diff | blob | history
My U-Boot fork