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(parent: 0f4b82a) | patch
armv8/fsl-lsch2: fix sdhc clock frequency value
authorYangbo Lu <yangbo.lu@nxp.com>
Tue, 16 Feb 2016 02:54:41 +0000 (10:54 +0800)
committerYork Sun <york.sun@nxp.com>
Mon, 21 Mar 2016 19:42:14 +0000 (12:42 -0700)
commite477f4bdd40496a53f7c2c4290ef4ba16ca4d869
tree64172924faeae79833f56ff6012c3253130cb56dtree | snapshot
parent0f4b82a555a3b4eab2febf06eedf51ad85ba8dddcommit | diff
armv8/fsl-lsch2: fix sdhc clock frequency value

The eSDHC could select to use platform clock or peripheral clock to
generate SD clock. The default selection is platform clock. So, fix
the clock frequency value that's calculated for eSDHC.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c diff | blob | history
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