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(parent: 8c38e4d) | patch
x86: Reduce PIRQ routing table size
authorBin Meng <bmeng.cn@gmail.com>
Tue, 23 Jun 2015 04:18:47 +0000 (12:18 +0800)
committerSimon Glass <sjg@chromium.org>
Wed, 15 Jul 2015 00:03:17 +0000 (18:03 -0600)
commitdf81749db7d7303508be41503e4c8d1229a07d4c
tree8043e6019215094cdb0d822ad26a9d4b594c1a28tree | snapshot
parent8c38e4d0b8d37dcd3bfd2293481e220b1b4a3a42commit | diff
x86: Reduce PIRQ routing table size

There is no need to populate multiple irq info entries with the same
bus number and device number, but with different interrupt pin. We
can use the same entry to store all the 4 interrupt pin (INT A/B/C/D)
routing information to reduce the whole PIRQ routing table size.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
arch/x86/cpu/irq.c diff | blob | history
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