[ppc4xx] Separate settings for PCIe bus numbering on 440SPe rev.A

[ppc4xx] Separate settings for PCIe bus numbering on 440SPe rev.A

This brings back separate settings for PCIe bus numbers depending on chip
revision, which got eliminated in 2b393b0f0af8402ef43b25c1968bfd29714ddffa
commit. 440SPe rev. A does NOT work properly with the same settings as for
the rev. B (no devices are seen on the bus during enumeration).

Signed-off-by: Rafal Jaworowski <raj@semihalf.com>