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armv8/layerscape: Update MMU table with execute-never bits
authorAlison Wang <b18965@freescale.com>
Thu, 5 Nov 2015 03:15:49 +0000 (11:15 +0800)
committerYork Sun <yorksun@freescale.com>
Mon, 30 Nov 2015 17:11:11 +0000 (09:11 -0800)
commitd764129d30768df72cd07844dd50d11e74b0de14
tree92ea1506c470dd8f0f04928858e57d4017b65272tree | snapshot
parent61bd2f75f5eaf645e2c90fe2294cba37f7d8627fcommit | diff
armv8/layerscape: Update MMU table with execute-never bits

For most device addresses excution shouldn't be allowed. Revise
the MMU table to enforce execute-never bits. OCRAM, DDR and IFC
are allowed for excution.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Alison Wang <alison.wang@freescale.com>
Reported-by: Zhichun Hua <zhichun.hua@freescale.com>
arch/arm/cpu/armv8/cache_v8.c diff | blob | history
arch/arm/cpu/armv8/fsl-layerscape/cpu.c diff | blob | history
arch/arm/include/asm/arch-fsl-layerscape/cpu.h diff | blob | history
arch/arm/include/asm/armv8/mmu.h diff | blob | history
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