git.dujemihanovic.xyz Git - u-boot.git/commit

]> git.dujemihanovic.xyz Git - u-boot.git/commit

author	Anup Patel <Anup.Patel@wdc.com>
	Tue, 25 Jun 2019 06:31:02 +0000 (06:31 +0000)
committer	Andes <uboot@andestech.com>
	Fri, 19 Jul 2019 06:24:51 +0000 (14:24 +0800)
commit	d04c79d2b238e857c1b1f45a78d173152792b371
tree	fada51871af3e67dabd9e880d183ba295ca5c8fe	tree \| snapshot
parent	0de815356474912ef5bef9a69f0327a5a93bb2c2	commit \| diff

clk: sifive: Factor-out PLL library as separate module

To match SiFive clock driver with latest Linux, we factor-out PLL
library as separate module under drivers/clk/analogbits.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

drivers/clk/Kconfig		diff \| blob \| history
drivers/clk/Makefile		diff \| blob \| history
drivers/clk/analogbits/Kconfig	[new file with mode: 0644]	blob
drivers/clk/analogbits/Makefile	[new file with mode: 0644]	blob
drivers/clk/analogbits/wrpll-cln28hpc.c	[moved from drivers/clk/sifive/wrpll-cln28hpc.c with 99% similarity]	diff \| blob \| history
drivers/clk/sifive/Kconfig		diff \| blob \| history
drivers/clk/sifive/Makefile		diff \| blob \| history
drivers/clk/sifive/fu540-prci.c		diff \| blob \| history
include/linux/clk/analogbits-wrpll-cln28hpc.h	[moved from drivers/clk/sifive/analogbits-wrpll-cln28hpc.h with 100% similarity]	blob \| history

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