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fpga: zynqpl: Flush dcache only for non-bitstream data
authorT Karthik Reddy <t.karthik.reddy@xilinx.com>
Tue, 12 Mar 2019 14:50:23 +0000 (20:20 +0530)
committerMichal Simek <michal.simek@xilinx.com>
Wed, 24 Jun 2020 11:07:58 +0000 (13:07 +0200)
commitca0c0e07adf3c3baf3851fc17490a0160398c834
tree2814d566c027c0a829e1992d03c68452b626cbb5tree | snapshot
parentc64afba2fb483d416ad5da9dfe3f1f156ccf2366commit | diff
fpga: zynqpl: Flush dcache only for non-bitstream data

In case of aes decryption destination address range must be flushed
before transferring decrypted data to destination.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
drivers/fpga/zynqpl.c diff | blob | history
My U-Boot fork