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(parent: c8bc3c0) | patch
armv8: fsl-lsch3: Make CCN-504 related code conditional
authorAshish Kumar <Ashish.Kumar@nxp.com>
Fri, 18 Aug 2017 05:24:36 +0000 (10:54 +0530)
committerYork Sun <york.sun@nxp.com>
Mon, 11 Sep 2017 14:55:36 +0000 (07:55 -0700)
commitc055cee1951a01a3306f54f20bcfb85adf28721a
treeb59727a8075cfc4b7375f3686b38581f9de9d466tree | snapshot
parentc8bc3c0c9ff7ce649b2af1416919b50ecf504874commit | diff
armv8: fsl-lsch3: Make CCN-504 related code conditional

LS2080 family has CCN-504 cache coherent interconnet. Other SoCs
in LSCH3 family may have differnt interconnect.

Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
[YS: revised commit message]
Reviewed-by: York Sun <york.sun@nxp.com>
README diff | blob | history
arch/arm/cpu/armv8/fsl-layerscape/Kconfig diff | blob | history
arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S diff | blob | history
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