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(parent: 028dbb8) | patch
fsl_sec: Add hardware accelerated SHA256 and SHA1
authorRuchika Gupta <ruchika.gupta@freescale.com>
Wed, 15 Oct 2014 06:05:30 +0000 (11:35 +0530)
committerYork Sun <yorksun@freescale.com>
Thu, 16 Oct 2014 21:17:07 +0000 (14:17 -0700)
commitb9eebfade974c86c8ddef64793649374c9876242
treef3ed778c53a050b715b70845f16e0c8c4b017932tree | snapshot
parent028dbb8db1d18c5835ab34659f9ef7a516571524commit | diff
fsl_sec: Add hardware accelerated SHA256 and SHA1

SHA-256 and SHA-1 accelerated using SEC hardware in Freescale SoC's
The driver for SEC (CAAM) IP is based on linux drivers/crypto/caam.
The platforms needto add the MACRO CONFIG_FSL_CAAM inorder to
enable initialization of this hardware IP.

Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
14 files changed:
arch/powerpc/cpu/mpc85xx/cpu_init.c diff | blob | history
arch/powerpc/include/asm/immap_85xx.h diff | blob | history
arch/powerpc/include/asm/types.h diff | blob | history
drivers/crypto/Makefile diff | blob | history
drivers/crypto/fsl/Makefile [new file with mode: 0644] blob
drivers/crypto/fsl/desc.h [new file with mode: 0644] blob
drivers/crypto/fsl/desc_constr.h [new file with mode: 0644] blob
drivers/crypto/fsl/error.c [new file with mode: 0644] blob
drivers/crypto/fsl/fsl_hash.c [new file with mode: 0644] blob
drivers/crypto/fsl/jobdesc.c [new file with mode: 0644] blob
drivers/crypto/fsl/jobdesc.h [new file with mode: 0644] blob
drivers/crypto/fsl/jr.c [new file with mode: 0644] blob
drivers/crypto/fsl/jr.h [new file with mode: 0644] blob
include/fsl_sec.h diff | blob | history
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