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rockchip: rk3568: enable automatic power savings
authorChris Morgan <macromorgan@hotmail.com>
Mon, 13 Feb 2023 22:27:39 +0000 (16:27 -0600)
committerKever Yang <kever.yang@rock-chips.com>
Tue, 28 Feb 2023 10:07:27 +0000 (18:07 +0800)
commit95ef2aaedc7adeb2dcb922c6525d5b3df1b198e5
treec2f1b8a2cf17dcc568c546ec58d1a7030b8e7351tree | snapshot
parent0d61f8e5f1c0035c3ee105d940b5b8d90bcec5b0commit | diff
rockchip: rk3568: enable automatic power savings

It enables automatic clock gating on idle, disables the eDP phy by
default, and sets the core pvtpll ring length. It is reported this
lowers the temperature on at least one SoC by 7C.

Signed-off-by: Peter Geis <pgwipeout@gmail.com>
Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
arch/arm/mach-rockchip/rk3568/rk3568.c diff | blob | history
My U-Boot fork