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(parent: 40f8dec) | patch
ARMv8/ls2085a: Enable secondary cores
authorYork Sun <yorksun@freescale.com>
Mon, 8 Sep 2014 19:20:01 +0000 (12:20 -0700)
committerYork Sun <yorksun@freescale.com>
Thu, 25 Sep 2014 15:36:19 +0000 (08:36 -0700)
commit8bfa301b0a30f57888d2117767b23f168760bc40
tree623535f20c95354efb54eb2313393bd3499cbfe4tree | snapshot
parent40f8dec54d7803975aed1c88327002c95ea99908commit | diff
ARMv8/ls2085a: Enable secondary cores

Spin table is at the very beginning of boot code. Each core has an individual
release address within the spin table, the ft_cpu_setup fn updates the
"cpu-release-addr" property of each cpu node with the corresponding release
address.

Also fix CPU_RELEASE_ADDR to point to secondary_boot_func.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Arnab Basu <arnab.basu@freescale.com>
board/freescale/ls2085a/ls2085a.c diff | blob | history
include/configs/ls2085a_common.h diff | blob | history
My U-Boot fork