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(parent: 3ccd49c) | patch
x86: Change pci option rom area MTRR setting to cacheable
authorBin Meng <bmeng.cn@gmail.com>
Wed, 15 Jul 2015 08:23:38 +0000 (16:23 +0800)
committerSimon Glass <sjg@chromium.org>
Tue, 28 Jul 2015 16:36:22 +0000 (10:36 -0600)
commit8ba25eec868aa40a42360397ec57f74fcaec3103
tree8527028fdb7090228acf5d252d18e9346b0e80batree | snapshot
parent3ccd49cab40603c41dd7d1ada0b971d59b93940dcommit | diff
x86: Change pci option rom area MTRR setting to cacheable

Turn on cache on the pci option rom area to improve the performance.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
arch/x86/cpu/cpu.c diff | blob | history
arch/x86/include/asm/mtrr.h diff | blob | history
My U-Boot fork