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(merge: d22c8be 61ce84b)
Merge https://gitlab.denx.de/u-boot/custodians/u-boot-riscv
authorTom Rini <trini@konsulko.com>
Tue, 3 Sep 2019 03:21:44 +0000 (23:21 -0400)
committerTom Rini <trini@konsulko.com>
Tue, 3 Sep 2019 03:21:44 +0000 (23:21 -0400)
commit83a5df42614c566c3c642871f683e66a53d228ae
treeea53c8fd1dd9bf65bc1d29dd9a0957d060dc1917tree | snapshot
parentd22c8be964a870f59d2fdab6c67cefa0c4799364commit | diff
parent61ce84b2cf1a6672c8e402ce8174554b25629692commit | diff
Merge https://gitlab.denx.de/u-boot/custodians/u-boot-riscv

- Skip unavailable hart in the get_count().
- fu540 set serial env from otp.
- fu540 add mmc0 as a boot target device.
- Update fix_rela_dyn and add absolute reloc addend.
- Andestech PLIC driver will skip unavailable hart.
- Support Andestech V5L2 cache driver.
My U-Boot fork