git.dujemihanovic.xyz Git - u-boot.git/commit

]> git.dujemihanovic.xyz Git - u-boot.git/commit

author	Mingkai Hu <Mingkai.Hu@freescale.com>
	Mon, 26 Oct 2015 11:47:51 +0000 (19:47 +0800)
committer	York Sun <yorksun@freescale.com>
	Thu, 29 Oct 2015 17:34:00 +0000 (10:34 -0700)
commit	8281c58fd46d095e28e60b2fb0ce84b4444896f8
tree	f2e2bc68eb6d3fdcd7cc99a3718602206477029c	tree \| snapshot
parent	9f3183d2d69f6d392fb943d249934f8648531e7e	commit \| diff

armv8/fsl_lsch2: Add fsl_lsch2 SoC

Freescale LayerScape with Chassis Generation 2 is a set of SoCs with
ARMv8 cores and 2rd generation of Chassis.

Signed-off-by: Li Yang <leoli@freescale.com>
Signed-off-by: Hou Zhiqiang <B48286@freescale.com>
Signed-off-by: Mingkai Hu <Mingkai.Hu@freescale.com>
Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>

14 files changed:

arch/arm/cpu/armv8/fsl-layerscape/Makefile		diff \| blob \| history
arch/arm/cpu/armv8/fsl-layerscape/README.lsch2	[new file with mode: 0644]	blob
arch/arm/cpu/armv8/fsl-layerscape/cpu.c		diff \| blob \| history
arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_serdes.c	[new file with mode: 0644]	blob
arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c	[new file with mode: 0644]	blob
arch/arm/cpu/armv8/fsl-layerscape/soc.c		diff \| blob \| history
arch/arm/include/asm/arch-fsl-layerscape/config.h		diff \| blob \| history
arch/arm/include/asm/arch-fsl-layerscape/cpu.h		diff \| blob \| history
arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h		diff \| blob \| history
arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	[new file with mode: 0644]	blob
arch/arm/include/asm/arch-fsl-layerscape/ns_access.h	[new file with mode: 0644]	blob
arch/arm/include/asm/arch-fsl-layerscape/soc.h		diff \| blob \| history
arch/arm/include/asm/armv8/mmu.h		diff \| blob \| history
include/common.h		diff \| blob \| history

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