]> git.dujemihanovic.xyz Git - u-boot.git/commit
NAND: fix "raw" reads with ECC syndrome layouts
authorDavid Brownell <dbrownell@users.sourceforge.net>
Sat, 7 Nov 2009 21:27:01 +0000 (16:27 -0500)
committerScott Wood <scottwood@freescale.com>
Fri, 13 Nov 2009 22:56:17 +0000 (16:56 -0600)
commit7e86661cd777eec1e81c5e57c468e81138fda983
tree89fbc4f13474f6cb6de521d312128951ce798358
parent5df3c2b62cebaa0ddb2817364f93726e5dbe3525
NAND: fix "raw" reads with ECC syndrome layouts

The syndrome based page read/write routines store ECC, and possibly other
"OOB" data, right after each chunk of ECC'd data.  With ECC chunk size of
512 bytes and a large page (2KiB) NAND, the layout is:

  data-0 OOB-0 data-1 OOB-1 data-2 OOB-2 data-3 OOB-3 OOB-leftover

Where OOBx is (prepad, ECC, postpad).  However, the current "raw" routines
use a traditional layout -- data OOB, disregarding the prepad and postpad
values -- so when they're used with that type of ECC hardware, those calls
mix up the data and OOB.  Which means, in particular, that bad block
tables won't be found on startup, with data corruption and related chaos
ensuing.

The current syndrome-based drivers in mainline all seem to use one chunk
per page; presumably they haven't noticed such bugs.

Fix this, by adding read/write page_raw_syndrome() routines as siblings of
the existing non-raw routines; "raw" just means to bypass the ECC
computations, not change data and OOB layout.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
drivers/mtd/nand/nand_base.c