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(parent: 84cf295) | patch
arm: mach-omap2: am33xx: Enable HW Leveling in the rtc+ddr path
authorBrad Griffis <bgriffis@ti.com>
Mon, 29 Apr 2019 04:29:30 +0000 (09:59 +0530)
committerTom Rini <trini@konsulko.com>
Sun, 5 May 2019 12:48:50 +0000 (08:48 -0400)
commit6fe3e5ba66ca2a474c46710ebb544a3572b0e64d
treefc7ad7192bc198dc60adcbf34b424dcafb482bd7tree | snapshot
parent84cf295f8454156be70958c8dba2c1368942626ecommit | diff
arm: mach-omap2: am33xx: Enable HW Leveling in the rtc+ddr path

Enable HW leveling in RTC+DDR path. The mandate is to enable
HW leveling bit and then wait for 1 ms before accessing any
register.

Signed-off-by: Brad Griffis <bgriffis@ti.com>
Signed-off-by: Keerthy <j-keerthy@ti.com>
arch/arm/mach-omap2/am33xx/board.c diff | blob | history
My U-Boot fork