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ppc/8xxx: Misc DDR related fixes
authorKumar Gala <galak@kernel.crashing.org>
Thu, 10 Sep 2009 19:54:55 +0000 (14:54 -0500)
committerKumar Gala <galak@kernel.crashing.org>
Wed, 16 Sep 2009 02:30:08 +0000 (21:30 -0500)
commit6d8565a1ed5acb01bad4a4cd74a93be5f7fb7f7c
treeddea3c52064b48f26d8d20f5034112ad94e65658tree | snapshot
parent3e3c9c157b89eab2dc2f897899b1b95cd70c1a58commit | diff
ppc/8xxx: Misc DDR related fixes

* Fix setting of ESDMODE (MR1) register - the bit shifting was wrong
* Fix the format string to match size in a debug print

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
cpu/mpc8xxx/ddr/ctrl_regs.c diff | blob | history
cpu/mpc8xxx/ddr/ddr3_dimm_params.c diff | blob | history
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