git.dujemihanovic.xyz Git - u-boot.git/commit

]> git.dujemihanovic.xyz Git - u-boot.git/commit

author	Bin Meng <bmeng.cn@gmail.com>
	Mon, 12 Oct 2015 04:37:44 +0000 (21:37 -0700)
committer	Simon Glass <sjg@chromium.org>
	Wed, 21 Oct 2015 13:46:27 +0000 (07:46 -0600)
commit	638a05894169b07ea8f6d21b6925ca353ea6ebb7
tree	68308063e00f4b803a07b9f55d56b2973edc2c7b	tree \| snapshot
parent	8b185041a9f4c30dc5edb1e04c0834e931b8633f	commit \| diff

x86: Enable mrc cache for bayleybay and minnowmax

Now that we have added MRC cache for Intel FSP and BayTrail codes,
enable it for all BayTrail boards (Bayley Bay and Minnow Max).

Note it turns out that FSP for Intel Atom E6xx does not produce
the HOB for NV storage, so we don't have such functionality on
Intel Crown Bay board.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>

My U-Boot fork

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arch/x86/dts/bayleybay.dts		diff \| blob \| history
arch/x86/dts/minnowmax.dts		diff \| blob \| history
configs/bayleybay_defconfig		diff \| blob \| history
configs/minnowmax_defconfig		diff \| blob \| history
doc/README.x86		diff \| blob \| history