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(parent: 43a2183) | patch
common: board_r: support enable_caches for RISC-V
authorZong Li <zong.li@sifive.com>
Wed, 1 Sep 2021 07:01:40 +0000 (15:01 +0800)
committerLeo Yu-Chi Liang <ycliang@andestech.com>
Tue, 7 Sep 2021 02:34:29 +0000 (10:34 +0800)
commit4d4222d07432faffe3a0fe35c483e116a28eb217
treed231a09a9223c329f6b3dde902a43695e2c96e26tree | snapshot
parent43a21839285c1ba3b65534def898a2b5e2d46314commit | diff
common: board_r: support enable_caches for RISC-V

The enable_caches is a generic hook for architecture-implemented, we
leverage this function to enable caches for RISC-V

Signed-off-by: Zong Li <zong.li@sifive.com>
Reviewed-by: Rick Chen <rick@andestech.com>
arch/riscv/lib/cache.c diff | blob | history
common/board_r.c diff | blob | history
My U-Boot fork