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clk: renesas: Synchronize R8A779G0 V4H clock tables with Linux 6.5.3
authorMarek Vasut <marek.vasut+renesas@mailbox.org>
Sun, 17 Sep 2023 14:11:37 +0000 (16:11 +0200)
committerMarek Vasut <marek.vasut+renesas@mailbox.org>
Sat, 30 Sep 2023 22:08:28 +0000 (00:08 +0200)
commit47ce17386bbeffe8f307b8902f6f8f3ebca67467
tree0f7e5858e1e7e3f1d2e583c4946a3b2b9018481ftree | snapshot
parent79d4ef4b472912b744e547b843cdddd2351574b2commit | diff
clk: renesas: Synchronize R8A779G0 V4H clock tables with Linux 6.5.3

Synchronize R-Car R8A779G0 V4H clock tables with Linux 6.5.3,
commit 238589d0f7b421aae18c5704dc931595019fa6c7 .

The PLL2_VAR is not implemented yet and PLL2 is still configured
as regular PLL2 only.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
drivers/clk/renesas/r8a779g0-cpg-mssr.c diff | blob | history
My U-Boot fork