]> git.dujemihanovic.xyz Git - u-boot.git/commit
fpga: zynqpl: Correct PL bitstream loading sequence for zynqaes
authorSiva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Wed, 9 Dec 2015 13:16:43 +0000 (18:46 +0530)
committerMichal Simek <michal.simek@xilinx.com>
Wed, 24 Jun 2020 11:07:57 +0000 (13:07 +0200)
commit3427f4d2045729c8995b19407daf91ea9a50e4f8
treeca468dac178a837e6d38b353af17640ac2c22055
parent4c86e0834aeb3ae06389534ccbc90b8bcf5d95bf
fpga: zynqpl: Correct PL bitstream loading sequence for zynqaes

Correct the PL bitstream loading sequence for zynqaes command by
clearing the loaded PL bitstream before loading the new encrypted
bitstream using the zynq aes command. This was done by setting
the PROG_B same as in case of fpgaload commands.
This patch fixes the issue of loading the encrypted PL bitstream
onto the PL in which a bitstream has already been loaded
successfully.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
board/xilinx/zynq/cmds.c
drivers/fpga/zynqpl.c
include/zynqpl.h