]> git.dujemihanovic.xyz Git - u-boot.git/commit
rtc: ds1307: Fix incorrect clock reset for DS13xx
authorCallum Sinclair <callum.sinclair@alliedtelesis.co.nz>
Tue, 10 Aug 2021 02:51:15 +0000 (14:51 +1200)
committerTom Rini <trini@konsulko.com>
Wed, 1 Sep 2021 23:25:37 +0000 (19:25 -0400)
commit223c44904d86a14d6c17e73696186c402e9ba958
treefe6e35dc876cde0a0c2da0f6adc060beb254ccb5
parent8956854d4839341b61b70aae1f6df53d05084fb2
rtc: ds1307: Fix incorrect clock reset for DS13xx

The ds1307 driver also supports the DS1339 and DS1340.
However, in ds1307_rtc_reset the register writes assume that the chip
is a DS1307. This is evident in the writing of bits SQWE, RS1, RS0 to
the control register. While this applies correctly to the DS1307, on a
DS1340 the control register doesn't contain those bits (instead, the
register is used for clock calibration). By writing these bits the
clock calibration will be changed and the chip can become
non-functional after a reset call.

Signed-off-by: Callum Sinclair <callum.sinclair@alliedtelesis.co.nz>
drivers/rtc/ds1307.c