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(parent: 5db4972) | patch
riscv: cpu: jh7110: Add support for jh7110 SoC
authorYanhong Wang <yanhong.wang@starfivetech.com>
Wed, 29 Mar 2023 03:42:08 +0000 (11:42 +0800)
committerLeo Yu-Chi Liang <ycliang@andestech.com>
Thu, 20 Apr 2023 08:08:44 +0000 (16:08 +0800)
commit218534153ec8932a873dcca48a1a2b4aba0e32b5
tree338d0889dff1dfc7bb609efe03e18836cfc18d41tree | snapshot
parent5db4972a5bbdbf9e3af48ffc9bc4fec73b7b6a79commit | diff
riscv: cpu: jh7110: Add support for jh7110 SoC

Add StarFive JH7110 SoC to support RISC-V arch.

Signed-off-by: Yanhong Wang <yanhong.wang@starfivetech.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Tested-by: Conor Dooley <conor.dooley@microchip.com>
arch/riscv/cpu/jh7110/Makefile [new file with mode: 0644] blob
arch/riscv/cpu/jh7110/cpu.c [new file with mode: 0644] blob
arch/riscv/cpu/jh7110/dram.c [new file with mode: 0644] blob
arch/riscv/cpu/jh7110/spl.c [new file with mode: 0644] blob
arch/riscv/include/asm/arch-jh7110/regs.h [new file with mode: 0644] blob
arch/riscv/include/asm/arch-jh7110/spl.h [new file with mode: 0644] blob
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