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armv8: ls1028a: configure PMU's PCTBENR to enable WDT
authorThomas Schaefer <thomas.schaefer@kontron.com>
Thu, 8 Aug 2019 08:00:30 +0000 (16:00 +0800)
committerPriyanka Jain <priyanka.jain@nxp.com>
Thu, 12 Sep 2019 10:45:42 +0000 (16:15 +0530)
commit0490cab58407afc23df4fbc05204c23395efd3fe
tree735120c061fb9ac67ac4acf15946a7f245418ebdtree | snapshot
parenta3ce94b6024b93e7ab2ceaf7a6dc08c590bb3f5acommit | diff
armv8: ls1028a: configure PMU's PCTBENR to enable WDT

The SP805-WDT module on LS1028A requires configuration of PMU's
PCTBENR register to enable watchdog counter decrement and reset
signal generation. The watchdog clock needs to be enabled first.

Signed-off-by: Thomas Schaefer <thomas.schaefer@kontron.com>
Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
arch/arm/cpu/armv8/fsl-layerscape/cpu.c diff | blob | history
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