From 787964b8118b47a50bda796a315068639977c884 Mon Sep 17 00:00:00 2001
From: Prabhakar Kushwaha <prabhakar@freescale.com>
Date: Tue, 24 Sep 2013 15:58:35 +0530
Subject: [PATCH] boards/c29xpcie: Update TLB and LAW size for IFC NAND, CPLD
NAND,CPLD AMASK register is programmed for 64K size.
so Update TLB & LAW size accordingly.
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
---
board/freescale/c29xpcie/law.c | 4 ++--
board/freescale/c29xpcie/tlb.c | 4 ++--
2 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/board/freescale/c29xpcie/law.c b/board/freescale/c29xpcie/law.c
index cd8fc2105d..80e5fff7c5 100644
--- a/board/freescale/c29xpcie/law.c
+++ b/board/freescale/c29xpcie/law.c
@@ -10,8 +10,8 @@
struct law_entry law_table[] = {
SET_LAW(CONFIG_SYS_FLASH_BASE_PHYS, LAW_SIZE_64M, LAW_TRGT_IF_IFC),
- SET_LAW(CONFIG_SYS_CPLD_BASE_PHYS, LAW_SIZE_4K, LAW_TRGT_IF_IFC),
- SET_LAW(CONFIG_SYS_NAND_BASE_PHYS, LAW_SIZE_16K, LAW_TRGT_IF_IFC),
+ SET_LAW(CONFIG_SYS_CPLD_BASE_PHYS, LAW_SIZE_64K, LAW_TRGT_IF_IFC),
+ SET_LAW(CONFIG_SYS_NAND_BASE_PHYS, LAW_SIZE_64K, LAW_TRGT_IF_IFC),
SET_LAW(CONFIG_SYS_PLATFORM_SRAM_BASE_PHYS, LAW_SIZE_512K,
LAW_TRGT_IF_PLATFORM_SRAM),
};
diff --git a/board/freescale/c29xpcie/tlb.c b/board/freescale/c29xpcie/tlb.c
index ddd1ef80b2..84844ee0f5 100644
--- a/board/freescale/c29xpcie/tlb.c
+++ b/board/freescale/c29xpcie/tlb.c
@@ -46,11 +46,11 @@ struct fsl_e_tlb_entry tlb_table[] = {
SET_TLB_ENTRY(1, CONFIG_SYS_CPLD_BASE, CONFIG_SYS_CPLD_BASE_PHYS,
MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
- 0, 4, BOOKE_PAGESZ_4K, 1),
+ 0, 4, BOOKE_PAGESZ_64K, 1),
SET_TLB_ENTRY(1, CONFIG_SYS_NAND_BASE, CONFIG_SYS_NAND_BASE_PHYS,
MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
- 0, 5, BOOKE_PAGESZ_16K, 1),
+ 0, 5, BOOKE_PAGESZ_64K, 1),
SET_TLB_ENTRY(1, CONFIG_SYS_PLATFORM_SRAM_BASE,
CONFIG_SYS_PLATFORM_SRAM_BASE_PHYS,
--
2.39.5