From 3191611a05df993826a0d2d0d5607e5e38365cce Mon Sep 17 00:00:00 2001
From: Marek Vasut <marex@denx.de>
Date: Thu, 9 Jul 2015 04:27:28 +0200
Subject: [PATCH] arm: socfpga: reset: Add function to reset add peripherals
Add socfpga_per_reset_all() function to reset all peripherals
but the L4 watchdog. This is needed in the SPL.
Signed-off-by: Marek Vasut <marex@denx.de>
---
arch/arm/mach-socfpga/include/mach/reset_manager.h | 1 +
arch/arm/mach-socfpga/reset_manager.c | 13 +++++++++++++
2 files changed, 14 insertions(+)
diff --git a/arch/arm/mach-socfpga/include/mach/reset_manager.h b/arch/arm/mach-socfpga/include/mach/reset_manager.h
index 97f155daa1..457c4b8ba6 100644
--- a/arch/arm/mach-socfpga/include/mach/reset_manager.h
+++ b/arch/arm/mach-socfpga/include/mach/reset_manager.h
@@ -13,6 +13,7 @@ void reset_deassert_peripherals_handoff(void);
void socfpga_bridges_reset(int enable);
void socfpga_per_reset(u32 reset, int set);
+void socfpga_per_reset_all(void);
struct socfpga_reset_manager {
u32 status;
diff --git a/arch/arm/mach-socfpga/reset_manager.c b/arch/arm/mach-socfpga/reset_manager.c
index 6a11c19200..1186358a71 100644
--- a/arch/arm/mach-socfpga/reset_manager.c
+++ b/arch/arm/mach-socfpga/reset_manager.c
@@ -39,6 +39,19 @@ void socfpga_per_reset(u32 reset, int set)
clrbits_le32(reg, 1 << RSTMGR_RESET(reset));
}
+/*
+ * Assert reset on every peripheral but L4WD0.
+ * Watchdog must be kept intact to prevent glitches
+ * and/or hangs.
+ */
+void socfpga_per_reset_all(void)
+{
+ const u32 l4wd0 = 1 << RSTMGR_RESET(SOCFPGA_RESET(L4WD0));
+
+ writel(~l4wd0, &reset_manager_base->per_mod_reset);
+ writel(0xffffffff, &reset_manager_base->per2_mod_reset);
+}
+
/*
* Write the reset manager register to cause reset
*/
--
2.39.5