From 253373d307e62ec6b78132ba9eae481fb748454c Mon Sep 17 00:00:00 2001 From: =?utf8?q?Pali=20Roh=C3=A1r?= <pali@kernel.org> Date: Wed, 5 Jan 2022 10:50:20 +0100 Subject: [PATCH] pci: iproc: Set all 24 bits of PCI class code MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit Register 0x43c in its low 24 bits contains PCI class code. Update code to set all 24 bits of PCI class code and not only upper 16 bits of PCI class code. Use standard U-Boot macro (PCI_CLASS_BRIDGE_PCI << 8) for constructing all 24-bits of PCI class for PCI bridge Normal decode. Signed-off-by: Pali Rohár <pali@kernel.org> Acked-by: Roman Bacik <roman.bacik@broadcom.com> --- drivers/pci/pcie_iproc.c | 9 ++++----- 1 file changed, 4 insertions(+), 5 deletions(-) diff --git a/drivers/pci/pcie_iproc.c b/drivers/pci/pcie_iproc.c index a31e74a0f2..85dfab5c72 100644 --- a/drivers/pci/pcie_iproc.c +++ b/drivers/pci/pcie_iproc.c @@ -1116,15 +1116,14 @@ static int iproc_pcie_check_link(struct iproc_pcie *pcie) u32 link_status, class; pcie->link_is_active = false; - /* force class to PCI_CLASS_BRIDGE_PCI (0x0604) */ + /* force class to PCI bridge Normal decode (0x060400) */ #define PCI_BRIDGE_CTRL_REG_OFFSET 0x43c -#define PCI_CLASS_BRIDGE_MASK 0xffff00 -#define PCI_CLASS_BRIDGE_SHIFT 8 +#define PCI_BRIDGE_CTRL_REG_CLASS_MASK 0xffffff iproc_pci_raw_config_read32(pcie, 0, PCI_BRIDGE_CTRL_REG_OFFSET, 4, &class); - class &= ~PCI_CLASS_BRIDGE_MASK; - class |= (PCI_CLASS_BRIDGE_PCI << PCI_CLASS_BRIDGE_SHIFT); + class &= ~PCI_BRIDGE_CTRL_REG_CLASS_MASK; + class |= (PCI_CLASS_BRIDGE_PCI << 8); iproc_pci_raw_config_write32(pcie, 0, PCI_BRIDGE_CTRL_REG_OFFSET, 4, class); -- 2.39.5