From: Marek Vasut <marek.vasut+renesas@mailbox.org>
Date: Sat, 13 Jul 2024 13:19:05 +0000 (+0200)
Subject: arm: include: Remove duplicate newlines
X-Git-Tag: v2025.01-rc5-pxa1908~403^2~31
X-Git-Url: http://git.dujemihanovic.xyz/%7B%7B%20.Permalink%20%7D%7D?a=commitdiff_plain;h=d610edbcd63a0ffeceb8d8f19068a6eae896ad00;p=u-boot.git
arm: include: Remove duplicate newlines
Drop all duplicate newlines. No functional change.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
---
diff --git a/arch/arm/include/asm/byteorder.h b/arch/arm/include/asm/byteorder.h
index 20cce7657e..6a80be5750 100644
--- a/arch/arm/include/asm/byteorder.h
+++ b/arch/arm/include/asm/byteorder.h
@@ -15,7 +15,6 @@
#ifndef __ASM_ARM_BYTEORDER_H
#define __ASM_ARM_BYTEORDER_H
-
#include <asm/types.h>
#if !defined(__STRICT_ANSI__) || defined(__KERNEL__)
diff --git a/arch/arm/include/asm/emif.h b/arch/arm/include/asm/emif.h
index 2141a4581c..4a9e26f634 100644
--- a/arch/arm/include/asm/emif.h
+++ b/arch/arm/include/asm/emif.h
@@ -880,7 +880,6 @@ struct dmm_lisa_map_regs {
#define RL_FINAL 6
#endif
-
/* Interleaving policies at EMIF level- between banks and Chip Selects */
#define EMIF_INTERLEAVING_POLICY_MAX_INTERLEAVING 0
#define EMIF_INTERLEAVING_POLICY_NO_BANK_INTERLEAVING 3
@@ -913,7 +912,6 @@ struct dmm_lisa_map_regs {
*/
#define READ_IDLE_INTERVAL_NORMAL (50*1000)
-
/*
* Unless voltage is changing due to DVFS one ZQCS command every 50ms should
* be enough. This shoule be enough also in the case when voltage is changing
@@ -961,7 +959,6 @@ struct dmm_lisa_map_regs {
#define REG_SR_TIM 0xF
#define REG_PD_TIM 0xF
-
/* EMIF_PWR_MGMT_CTRL register */
#define EMIF_PWR_MGMT_CTRL (\
((REG_CS_TIM << EMIF_REG_CS_TIM_SHIFT) & EMIF_REG_CS_TIM_MASK)|\
diff --git a/arch/arm/include/asm/mach-imx/gpio.h b/arch/arm/include/asm/mach-imx/gpio.h
index 25763526f5..f7d751f402 100644
--- a/arch/arm/include/asm/mach-imx/gpio.h
+++ b/arch/arm/include/asm/mach-imx/gpio.h
@@ -4,7 +4,6 @@
* Stefano Babic, DENX Software Engineering, <sbabic@denx.de>
*/
-
#ifndef __ASM_ARCH_IMX_GPIO_H
#define __ASM_ARCH_IMX_GPIO_H
diff --git a/arch/arm/include/asm/mach-imx/mxc_i2c.h b/arch/arm/include/asm/mach-imx/mxc_i2c.h
index e8b330f33d..cf694de497 100644
--- a/arch/arm/include/asm/mach-imx/mxc_i2c.h
+++ b/arch/arm/include/asm/mach-imx/mxc_i2c.h
@@ -91,7 +91,6 @@ struct mxc_i2c_bus {
} \
};
-
#define I2C_PADS_INFO(name) \
(is_mx6dq() || is_mx6dqp()) ? &mx6q_##name : &mx6s_##name
#endif
diff --git a/arch/arm/include/asm/omap_common.h b/arch/arm/include/asm/omap_common.h
index 17fdfbcffb..9945eeb66b 100644
--- a/arch/arm/include/asm/omap_common.h
+++ b/arch/arm/include/asm/omap_common.h
@@ -814,7 +814,6 @@ static inline u8 is_dra76x_acd(void)
#define HS_DEVICE 0x2
#define GP_DEVICE 0x3
-
/*
* SRAM scratch space entries
*/
diff --git a/arch/arm/include/asm/opcodes.h b/arch/arm/include/asm/opcodes.h
index 21b3344298..bc2f9e7081 100644
--- a/arch/arm/include/asm/opcodes.h
+++ b/arch/arm/include/asm/opcodes.h
@@ -15,7 +15,6 @@ extern asmlinkage unsigned int arm_check_condition(u32 opcode, u32 psr);
#define ARM_OPCODE_CONDTEST_PASS 1
#define ARM_OPCODE_CONDTEST_UNCOND 2
-
/*
* Assembler opcode byteswap helpers.
* These are only intended for use by this header: don't use them directly,
@@ -42,7 +41,6 @@ extern asmlinkage unsigned int arm_check_condition(u32 opcode, u32 psr);
#define ___asm_opcode_identity32(x) ((x) & 0xFFFFFFFF)
#define ___asm_opcode_identity16(x) ((x) & 0xFFFF)
-
/*
* Opcode byteswap helpers
*
@@ -94,7 +92,6 @@ extern asmlinkage unsigned int arm_check_condition(u32 opcode, u32 psr);
#endif /* ! __ASSEMBLY__ */
-
#ifdef CONFIG_CPU_ENDIAN_BE8
#define __opcode_to_mem_arm(x) ___opcode_swab32(x)
diff --git a/arch/arm/include/asm/setup.h b/arch/arm/include/asm/setup.h
index e0e2d7e360..b8ca50a640 100644
--- a/arch/arm/include/asm/setup.h
+++ b/arch/arm/include/asm/setup.h
@@ -75,7 +75,6 @@ struct param_struct {
char commandline[COMMAND_LINE_SIZE];
};
-
/*
* The new way of passing information: a list of tagged entries
*/