From: Christian Marangi <ansuelsmth@gmail.com>
Date: Sat, 3 Aug 2024 08:40:45 +0000 (+0200)
Subject: clk: mediatek: mt7986: move INFRA_TRNG_CK to the bottom of the list
X-Git-Url: http://git.dujemihanovic.xyz/%7B%7B%20%24style.RelPermalink%20%7D%7D?a=commitdiff_plain;h=6636017ad3257eeccbc14706db1edd07479ca39b;p=u-boot.git

clk: mediatek: mt7986: move INFRA_TRNG_CK to the bottom of the list

Move INFRA_TRNG_CK to the bottom of the list to have a 1:1 match with
upstream linux clock ID.

Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
---

diff --git a/drivers/clk/mediatek/clk-mt7986.c b/drivers/clk/mediatek/clk-mt7986.c
index 08b7ab8a81..7476024f58 100644
--- a/drivers/clk/mediatek/clk-mt7986.c
+++ b/drivers/clk/mediatek/clk-mt7986.c
@@ -470,7 +470,6 @@ static const struct mtk_gate infracfg_ao_gates[] = {
 	GATE_INFRA0_INFRA(CK_INFRA_AP_DMA_CK, "infra_ap_dma", CK_INFRA_SYSAXI_D2, 16),
 	GATE_INFRA0_INFRA(CK_INFRA_SEJ_CK, "infra_sej", CK_INFRA_SYSAXI_D2, 24),
 	GATE_INFRA0_TOP(CK_INFRA_SEJ_13M_CK, "infra_sej_13m", CK_TOP_F26M_SEL, 25),
-	GATE_INFRA0_TOP(CK_INFRA_TRNG_CK, "infra_trng", CK_TOP_SYSAXI_SEL, 26),
 	/* INFRA1 */
 	GATE_INFRA1_TOP(CK_INFRA_THERM_CK, "infra_therm", CK_TOP_F26M_SEL, 0),
 	GATE_INFRA1_TOP(CK_INFRA_I2C0_CK, "infra_i2co", CK_TOP_I2C_SEL, 1),
@@ -511,6 +510,8 @@ static const struct mtk_gate infracfg_ao_gates[] = {
 	GATE_INFRA2_TOP(CK_INFRA_IPCIE_PIPE_CK, "infra_ipcie_pipe", CK_TOP_XTAL, 13),
 	GATE_INFRA2_TOP(CK_INFRA_IPCIER_CK, "infra_ipcier", CK_TOP_F26M_SEL, 14),
 	GATE_INFRA2_TOP(CK_INFRA_IPCIEB_CK, "infra_ipcieb", CK_TOP_SYSAXI_SEL, 15),
+	/* upstream linux unordered */
+	GATE_INFRA0_TOP(CK_INFRA_TRNG_CK, "infra_trng", CK_TOP_SYSAXI_SEL, 26),
 };
 
 static const struct mtk_clk_tree mt7986_fixed_pll_clk_tree = {
diff --git a/include/dt-bindings/clock/mt7986-clk.h b/include/dt-bindings/clock/mt7986-clk.h
index 7df1366590..39939f8e02 100644
--- a/include/dt-bindings/clock/mt7986-clk.h
+++ b/include/dt-bindings/clock/mt7986-clk.h
@@ -115,33 +115,33 @@
 #define CK_INFRA_SEJ_13M_CK		16
 #define CK_INFRA_THERM_CK		17
 #define CK_INFRA_I2C0_CK		18
-#define CK_INFRA_TRNG_CK		19
-#define CK_INFRA_UART0_CK		20
-#define CK_INFRA_UART1_CK		21
-#define CK_INFRA_UART2_CK		22
-#define CK_INFRA_NFI1_CK		23
-#define CK_INFRA_SPINFI1_CK		24
-#define CK_INFRA_NFI_HCK_CK		25
-#define CK_INFRA_SPI0_CK		26
-#define CK_INFRA_SPI1_CK		27
-#define CK_INFRA_SPI0_HCK_CK		28
-#define CK_INFRA_SPI1_HCK_CK		29
-#define CK_INFRA_FRTC_CK		30
-#define CK_INFRA_MSDC_CK		31
-#define CK_INFRA_MSDC_HCK_CK		32
-#define CK_INFRA_MSDC_133M_CK		33
-#define CK_INFRA_MSDC_66M_CK		34
-#define CK_INFRA_ADC_26M_CK		35
-#define CK_INFRA_ADC_FRC_CK		36
-#define CK_INFRA_FBIST2FPC_CK		37
-#define CK_INFRA_IUSB_133_CK		38
-#define CK_INFRA_IUSB_66M_CK		39
-#define CK_INFRA_IUSB_SYS_CK		40
-#define CK_INFRA_IUSB_CK		41
-#define CK_INFRA_IPCIE_CK		42
-#define CK_INFRA_IPCIE_PIPE_CK		43
-#define CK_INFRA_IPCIER_CK		44
-#define CK_INFRA_IPCIEB_CK		45
+#define CK_INFRA_UART0_CK		19
+#define CK_INFRA_UART1_CK		20
+#define CK_INFRA_UART2_CK		21
+#define CK_INFRA_NFI1_CK		22
+#define CK_INFRA_SPINFI1_CK		23
+#define CK_INFRA_NFI_HCK_CK		24
+#define CK_INFRA_SPI0_CK		25
+#define CK_INFRA_SPI1_CK		26
+#define CK_INFRA_SPI0_HCK_CK		27
+#define CK_INFRA_SPI1_HCK_CK		28
+#define CK_INFRA_FRTC_CK		29
+#define CK_INFRA_MSDC_CK		30
+#define CK_INFRA_MSDC_HCK_CK		31
+#define CK_INFRA_MSDC_133M_CK		32
+#define CK_INFRA_MSDC_66M_CK		33
+#define CK_INFRA_ADC_26M_CK		34
+#define CK_INFRA_ADC_FRC_CK		35
+#define CK_INFRA_FBIST2FPC_CK		36
+#define CK_INFRA_IUSB_133_CK		37
+#define CK_INFRA_IUSB_66M_CK		38
+#define CK_INFRA_IUSB_SYS_CK		39
+#define CK_INFRA_IUSB_CK		40
+#define CK_INFRA_IPCIE_CK		41
+#define CK_INFRA_IPCIE_PIPE_CK		42
+#define CK_INFRA_IPCIER_CK		43
+#define CK_INFRA_IPCIEB_CK		44
+#define CK_INFRA_TRNG_CK		45
 #define CLK_INFRA_AO_NR_CLK		46
 
 /* APMIXEDSYS */