]> git.dujemihanovic.xyz Git - u-boot.git/commitdiff
mtd: spi-nor-ids: Add support of flash protection to w25q128
authorSu Baocheng <baocheng.su@siemens.com>
Mon, 25 Jan 2021 02:59:05 +0000 (10:59 +0800)
committerJagan Teki <jagan@amarulasolutions.com>
Fri, 26 Feb 2021 08:05:25 +0000 (13:35 +0530)
The NOR flash w25q128 denoted by JEDEC ID 0xef4018 actually represents
various models. From Winbond's website, I could only find 3 types of
them:

    W25Q128JV-IQ/JQ
    datasheet:https://www.winbond.com/resource-files/
w25q128jv%20revg%2004082019%20plus.pdf

    W25Q128FV (SPI Mode)
    datasheet: https://www.winbond.com/resource-files/
w25q128fv%20rev.m%2005132016%20kms.pdf

    W25Q128BV
    datesheet: https://www.winbond.com/resource-files/
w25q128bv_revh_100313_wo_automotive.pdf

According to the datasheets, all of these 3 types support BP(0,1,2) and
TB bits in the status register (SR), so it could reuse the flash
protection logic for ST Micro.

So it should be safe to add the SPI_NOR_HAS_LOCK and SPI_NOR_HAS_TB
flags to the w25q128 entry of spi_nor_ids table.

Signed-off-by: Su Baocheng <baocheng.su@siemens.com>
[jagan: remove comments in spi-nor-ids.c]
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
drivers/mtd/spi/spi-nor-ids.c

index 26eac62f59fc0a4bada9644fe33fbf472d55b45e..2b57797954c5048931437ec11ca947c128a3e868 100644 (file)
@@ -324,7 +324,10 @@ const struct flash_info spi_nor_ids[] = {
        { INFO("w25q80bl", 0xef4014, 0, 64 * 1024,  16, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
        { INFO("w25q16cl", 0xef4015, 0, 64 * 1024,  32, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
        { INFO("w25q64cv", 0xef4017, 0, 64 * 1024,  128, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
-       { INFO("w25q128", 0xef4018, 0, 64 * 1024, 256, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
+       { INFO("w25q128", 0xef4018, 0, 64 * 1024, 256,
+                       SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
+                       SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
+       },
        { INFO("w25q256", 0xef4019, 0, 64 * 1024, 512, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
        { INFO("w25m512jw", 0xef6119, 0, 64 * 1024, 1024, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
        { INFO("w25m512jv", 0xef7119, 0, 64 * 1024, 1024, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },