ddr: marvell: a38x: disable WL phase correction stage in case of bus_width=16bit

commit 20c89a28548cdab11f88d2ec8936344af0686a1e upstream.

WL phase correcion stage is failing while using bus_width of 16bit, not
to be fix this stage is un-necessary when working with bus_width of 16
bit.

Signed-off-by: Moti Buskila <motib@marvell.com>
Reviewed-by: Kostya Porotchkin <kostap@marvell.com>
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Tested-by: Chris Packham <chris.packham@alliedtelesis.co.nz>

diff --git a/drivers/ddr/marvell/a38x/ddr3_training_db.c b/drivers/ddr/marvell/a38x/ddr3_training_db.c
index b2f11a839961525c4a26b57a63e94f5719cf3d28..6aa7b6069e8ce04aed72becd75800455ef431ba4 100644 (file)
--- a/drivers/ddr/marvell/a38x/ddr3_training_db.c
+++ b/drivers/ddr/marvell/a38x/ddr3_training_db.c
@@ -833,6 +833,9 @@ u32 pattern_table_get_word(u32 dev_num, enum hws_pattern type, u8 index)
                        pattern = pattern_table_get_isi_word16(index);
                        break;
                default:
+                       if (((int)type == 29) || ((int)type == 30))
+                               break;
+
                        printf("error: %s: unsupported pattern type [%d] found\n",
                               __func__, (int)type);
                        pattern = 0;