From 9818a00eead58a36fe39735dae5dbdc393f53463 Mon Sep 17 00:00:00 2001
From: Simon Glass <sjg@chromium.org>
Date: Thu, 1 Jan 2015 16:18:08 -0700
Subject: [PATCH] x86: ivybridge: Set up an MTRR for the video frame buffer
Set the frame buffer to write-combining. This makes it faster, although for
scrolling write-through is even faster for U-Boot.
Signed-off-by: Simon Glass <sjg@chromium.org>
---
arch/x86/cpu/ivybridge/gma.c | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/arch/x86/cpu/ivybridge/gma.c b/arch/x86/cpu/ivybridge/gma.c
index cf4f87c4e3..6cf9654e02 100644
--- a/arch/x86/cpu/ivybridge/gma.c
+++ b/arch/x86/cpu/ivybridge/gma.c
@@ -12,6 +12,7 @@
#include <fdtdec.h>
#include <pci_rom.h>
#include <asm/io.h>
+#include <asm/mtrr.h>
#include <asm/pci.h>
#include <asm/arch/pch.h>
#include <asm/arch/sandybridge.h>
@@ -735,6 +736,7 @@ int gma_func0_init(pci_dev_t dev, struct pci_controller *hose,
ulong start;
#endif
void *gtt_bar;
+ ulong base;
u32 reg32;
int ret;
@@ -743,6 +745,11 @@ int gma_func0_init(pci_dev_t dev, struct pci_controller *hose,
reg32 |= PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY | PCI_COMMAND_IO;
pci_write_config32(dev, PCI_COMMAND, reg32);
+ /* Use write-combining for the graphics memory, 256MB */
+ base = pci_read_bar32(hose, dev, 2);
+ mtrr_add_request(MTRR_TYPE_WRCOMB, base, 256 << 20);
+ mtrr_commit(true);
+
gtt_bar = (void *)pci_read_bar32(pci_bus_to_hose(0), dev, 0);
debug("GT bar %p\n", gtt_bar);
ret = gma_pm_init_pre_vbios(gtt_bar);
--
2.39.5